Herstellung von Hochqualitativen, Hochbelastbaren Kanalregionen in Gate-All-Around-Feldeffekttransistoren (gaa-Fets)

Details

Veröffentlichungs-Nr.

EP4718977

Anmeldetag

23. Juli 2025

Veröffentlichung

1. April 2026

Rechtsraum

EP

IPC

(LEE CHO-EUN et al.)(WANG CHIH-HAO et al.)(INTEL CORP et al.)

Abstract

In embodiments of the present disclosure, enhanced nanoribbons of GAA FETs are formed using a high-temperature diffusion process before the source/drain regions are formed. The diffusion process includes forming an additive material layer (212), for example comprising germanium, around crystalline nanoribbons (210), for example comprising silicon, (Fig. 2D), forming a capping layer (214) around the additive material layer (212) (Fig. 2D), diffusing the additive material into the crystalline nanoribbons via heating, (Fig. 2E), and removing the capping layer (214) (Fig. 2F).

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA