Integrierte Gate-All-Around-Schaltungsstrukturen mit Differenzierten Freisetzungsschichten

Details

Veröffentlichungs-Nr.

EP4718982

Anmeldetag

8. August 2025

Veröffentlichung

1. April 2026

Rechtsraum

EP

Abstract

Gate-all-around integrated circuit structures having differentiated release layers are described. For example, an integrated circuit structure includes a first set of horizontal nanowires above a sub-fin structure. A first gate structure is over the first set of horizontal nanowires. The first set of horizontal nanowires extends laterally beyond the first gate structure. A second set of horizontal nanowires is over the first set of horizontal nanowires. A second gate structure is over the second set of horizontal nanowires. The second set of horizontal nanowires extends laterally beyond the second gate structure. Dielectric spacers are adjacent to the first gate structure and the second gate structure and vertically between adjacent ones of the first set of horizontal nanowires and the second set of horizontal nanowires. Each of dielectric spacers has a notch at a location vertically between the first set of horizontal nanowires and the second set of horizontal nanowires.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA