Speichersteuerung mit Dynamischen Signalisierungsschemen

Details

Veröffentlichungs-Nr.

EP4723115

Anmeldetag

22. September 2025

Veröffentlichung

8. April 2026

Rechtsraum

EP

IPC

G11C7/10

Abstract

A memory controller in an integrated circuit system performs bi-directional data transfer at a clock frequency between the memory controller and a memory module. The data transfer in a first direction is at a first pulse amplitude modulation (PAM) level and in a second direction at a second PAM level. When receiving an indication of an increased demand for data transfer in the first direction, the memory controller increases the first PAM level to a target PAM level for data transfer in the first direction while maintaining the clock frequency and the second PAM level in the second direction.

Anmelder

Firma

MEDIATEK INC.

Land

🇹🇼 Taiwan