Integrierte Schaltungsstrukturen mit Rippenisolationsregionen, die durch Gate-Cut-Plugs Kontinuierlich Sind

Details

Veröffentlichungs-Nr.

EP4723834

Anmeldetag

7. Februar 2025

Veröffentlichung

8. April 2026

Rechtsraum

EP

IPC

H10D84/83

Abstract

An integrated circuit structure comprises a first fin over a first sub-fin (104); a trench isolation structure (106) adjacent to the first sub-fin; a first gate dielectric layer (110) over the first fin, and the first gate dielectric layer on the trench isolation structure; a first gate electrode (112) over the first gate dielectric layer; a first dielectric gate cut plug (122) laterally spaced apart from the first fin, the first dielectric gate cut plug in contact with the first gate electrode; a fin-trim isolation structure (130) laterally adjacent to the first dielectric gate cut plug and the trench isolation structure; a second dielectric gate cut plug (122) laterally adjacent to the fin-trim isolation structure; a second fin over a second sub-fin (104); a second gate dielectric layer (110); and a second gate electrode (112).

Anmelder

Firma

Intel Corporation

Land

🇺🇸 USA

Fachgebiete