Skalierbarer Codesignaturansatz für Steuerflussintegrität
Anmelder: NXP B.V. 🇳🇱
Details
- Veröffentlichungs-Nr.
- EP4733942
- Anmeldetag
- 20. Oktober 2025
- Veröffentlichung
- 29. April 2026
- Rechtsraum
- EP
- IPC
- G06F11/10
Abstract
A processor and methods of detecting a corrupted instruction stream within a processor include executing, by the processor, a program including a plurality of basic blocks, each of which includes a sequence of instructions to be executed by the processor without branching. The method includes implicitly initializing a first cyclic-redundancy-check (CRC) generator based on a first portion of an address of a first instruction in a first basic block and a second CRC generator based on a second portion of the address of the first instruction, generating, by the first CRC generator, a first CRC output according to a first polynomial and, by the second CRC generator, a second CRC output according to a second polynomial, and when an end of the first basic block is reached without encountering an instruction to transfer control from a first function to a second function, selectively deferring a CRC check operation.
Anmelder
- Firma
- NXP B.V.
- Land
- 🇳🇱 Niederlande
Niederländischer Halbleiterhersteller mit Sitz in Eindhoven. Entwickelt Chips und Halbleiterlösungen für Automobiltechnik, Kommunikation, Sicherheit sowie industrielle Anwendungen.
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