Laserloses Zerschneideverfahren
Anmelder: NXP USA, Inc. 🇺🇸
Details
- Veröffentlichungs-Nr.
- EP4734737
- Anmeldetag
- 23. Oktober 2025
- Veröffentlichung
- 29. April 2026
- Rechtsraum
- EP
- IPC
- H10P58/00
Abstract
Techniques for processing a wafer involve patterning the wafer to define via locations within dies of the wafer and simultaneously define saw street indentation locations within saw street regions of the wafer. The saw street regions are disposed between the dies of the wafer. Such techniques further involve creating a set of indentations within the wafer. The set of indentations includes via indentations at the via locations within the dies configured to support electrically conductive interconnects and saw street indentations at the saw street indentation locations within the saw street regions configured to facilitate dicing.
Anmelder
- Firma
- NXP USA, Inc.
- Land
- 🇺🇸 USA
US-amerikanische Gesellschaft des Halbleiterkonzerns NXP, die Chips und Halbleiterlösungen für Automobiltechnik, Kommunikation und Industrieelektronik entwickelt.
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