Weitbereichs-Zeit-Digital-Wandler mit Geringer Fläche

Details

Veröffentlichungs-Nr.

EP4741950

Anmeldetag

5. November 2025

Veröffentlichung

13. Mai 2026

Rechtsraum

EP

IPC

G04F10/00

Abstract

A time to digital converter including multiple programmable buffers coupled in series for receiving a pulse signal, latches configured to provide binary values indicative of the state of the buffers at the end of a timing pulse asserted on the pulse signal, and a phase converter configured to convert the binary values into a digital output value indicative of a measured delay of the timing pulse. Each of the buffers is configured with an adjustable delay based on a delay select input. The adjustable delay is used to select from among multiple different transition delays of each buffer. The buffers may be configured to be compatible with a standard cell layout. The buffers may be configured as standard cell logic gate with modified connections. The buffers may be calibrated by selecting a fastest delay value that does not cause overflow in response to a calibration pulse.

Anmelder

Firma

NXP USA, Inc.

Land

🇺🇸 USA