Speichervorrichtung und Verfahren zum Betrieb der Speichervorrichtung

Details

Veröffentlichungs-Nr.

EP4742244

Anmeldetag

22. August 2025

Veröffentlichung

13. Mai 2026

Rechtsraum

EP

IPC

G11C7/10

Abstract

A storage device includes a memory device and a memory controller to control the memory device by communicating with the memory device through a channel. The memory device includes a plurality of memory chips sharing the channel and each of the plurality of memory chips includes a transmission driver and an adaptive body bias generator. A target memory chip selected by the memory controller, among the plurality of memory chips, includes a first adaptive body bias generator and a first transmission driver. The first adaptive body bias generator applies a first body bias to the first transmission driver in a write mode in which the target memory chip receives a write data from the memory controller and applies a second body bias in a read mode in which the target memory chip transmits a read data to the memory controller.

Anmelder

Firma

SAMSUNG ELECTRONICS CO., LTD.

Land

🇰🇷 Südkorea