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Standorte
2Aktuelle Patente
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23.09.2026 · Prime Planet Energy & Solutio…
Positivelektrodenaktivmaterial, Positivelektrode und Sekundärbatterie
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Angemeldet am 25.02.2026
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Vertretung
Zusammenfassung
A positive electrode active material that can make the moisture absorption of a positive electrode small in the storage and that enables a secondary battery to have high volumetric energy density is provided. The positive electrode active material according to the present disclosure includes first lithium composite oxide particles in a single particle form, and second lithium composite oxide particles in a secondary particle form. In a volume-based particle size distribution obtained in accordance with a laser diffraction/scattering method, when the particle diameter at which the cumulative frequency becomes 10% is defined as 10% particle diameter (D10), the particle diameter at which the cumulative frequency becomes 50% is defined as 50% particle diameter (D50), and the particle diameter at which the cumulative frequency becomes 90% is defined as 90% particle diameter (D90), the 50% particle diameter (D50) of the first lithium composite oxide particles is smaller than the 50% particle diameter (D50) of the second lithium composite oxide particles and a particle size distribution width expressed by (D90 - D10)/D50 of the first lithium composite oxide particles is 1.20 or less. The particle breaking strength of the second lithium composite oxide particles is 200 MPa or less. |
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23.09.2026 · Samsung Electronics Co., Ltd.
Arrayorganisation in Dreidimensionalen Speicherschaltungen
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Status
Angemeldet am 16.03.2026
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Vertretung
Zusammenfassung
A system and a method for organizing a 3D memory circuit are disclosed. The 3D memory circuit includes a memory array and an activation circuit (235). The memory array is configured to be organized into N sections (340<1> to 340<N>). Each section has a row dimension K, a column dimension L, and a word line, WL, connected to L memory cells. The activation circuit (235) is configured to activate, in response to an activation, the WL to generate an activated WL. Each section includes a transfer circuit including a data switch and a select switch. The data switch is configured to route data between a local input/output, LIO, line and a global input/output, GIO, line. The select switch is configured to connect the LIO line to a bit line, BL, by a column select, CS, signal. The BL is connected to one of the L memory cells which is connected to the activated WL. |
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23.09.2026 · Samsung Electronics Co., Ltd.
Effiziente Datenübertragung in Speicherschaltungen
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Status
Angemeldet am 11.03.2026
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Zusammenfassung
A system and a method for a data transfer in a memory circuit are disclosed. The memory circuit includes a data transfer circuit (425), a column select, CS, decoder (412), and an access decoder (414). The data transfer circuit (425) includes a select switch configured to connect a local input/output, LIO, line to a bit line, BL, of a memory cell in a memory section (420) and a data switch configured to route data between LIO line and a global input/output, GIO, line connected to a data bus in response to an access operation. The CS decoder (412) is configured to decode a first part of a column address, CA, of the access operation to generate a CS signal that enables the select switch. The access decoder (414) is configured to decode a second part of the CA (430) and an access signal to generate an access enable, AE, signal that enables the data switch. |
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23.09.2026 · Toyota Jidosha Kabushiki Kaisha
Batteriepack und Elektrifiziertes Fahrzeug mit Batteriepack
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Status
Angemeldet am 16.03.2026
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Vertretung
Zusammenfassung
A battery pack (20) may include at least one battery cell (52), a casing (22) accommodating the at least one battery cell (52) and having a bottom wall (26) facing the at least one battery cell (52) from below, and a protective panel (38) joined to a lower surface (26b) of the bottom wall (26) of the casing (22) with adhesive (42). A weld bead (WJ) due to friction stir welding and a hole (26h) located at one end of the weld bead (WJ) may be present on the lower surface (26b) of the bottom wall (26) of the casing (22), and the hole (26h) may be covered with the adhesive (42). |
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23.09.2026 · Toyota Jidosha Kabushiki Kaisha
Membran-Elektroden-Einheit
Halbleiter & Elektrische Bauelemente
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Angemeldet am 05.03.2026
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Zusammenfassung
The present disclosure provides a membrane electrode assembly that provides both high durability and high performance. The present disclosure relates to a membrane electrode assembly, wherein the membrane electrode assembly contains a nitrogen-containing multidentate ligand capable of coordinating to metal ions, a cathode catalyst layer includes an electrode catalyst and an ionomer, the electrode catalyst is a metal-supported catalyst in which metal particles having catalytic activity are supported on a support having pores, and an external-internal surface area ratio is 1.20 or less, or an external-internal particle count ratio is 0.70 or less. |
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16.09.2026 · Toyota Jidosha Kabushiki Kaisha
Kathodenaktivmaterial, Kathodenmischung, Batterie und Verfahren zur Herstellung eines Kathodenaktivmaterials
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Angemeldet am 10.02.2026
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Zusammenfassung
A main object of the present disclosure is to provide a cathode active material with which the increase in resistance due to charge and discharge can be suppressed. The present disclosure achieves the object by providing a cathode active material including: a crystalline primary particle containing Li, TM, which is a transition metal, and O, wherein the cathode active material is an aggregate configured by a plurality of the primary particle; an average particle size of the primary particle in the aggregate is 0.5 µm or more; and in a pore diameter distribution obtained by a mercury press-in method, a peak is present in a range of 65 nm or more and 300 nm or less. |
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16.09.2026 · Samsung Electronics Co., Ltd.
Kurzwelleninfrarotpixel auf Basis von Nichtstreuenden Nanostrukturen
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Status
Angemeldet am 12.02.2026
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Zusammenfassung
Provided are systems, methods, and apparatuses for short-wave infrared pixels based on non-scattering nanostructures. In one or more examples, a pixel of a of an image sensor comprises a back reflector (205) formed on a substrate, the back reflector being configured to reflect electromagnetic radiation; a first doped region of a first semiconductor formed adjacent to the back reflector (205); an absorption region of a second semiconductor configured as a photodetector (210) of the pixel, the absorption region being formed adjacent to at least a portion of the first doped region; a second doped region of the first semiconductor formed adjacent to the absorption region, the second doped region being configured to pass the electromagnetic radiation to the absorption region; and a nanostructure (230) formed adjacent to the second doped region, the nanostructure (230) being configured to: steer light that passes through the nanostructure (230) towards the absorption region; and steer, towards the absorption region, a portion of the light that reflects off the back reflector (205). |
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16.09.2026 · Samsung Electronics Co., Ltd.
Verfahren und Vorrichtung zur Durchführung von Kanalmessung unter Verwendung von Transparentem Pseudozufälligem Rauschen
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Status
Angemeldet am 12.03.2026
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Zusammenfassung
Methods and devices for performing channel sounding, including: receiving a channel sounding signal generated based on a sounding sequence and an artificial noise symbol from the second electronic device; subtracting the artificial noise symbol from the channel sounding signal to reconstruct the sounding sequence; calculating a travel time between the first electronic device and the second electronic device based on the sounding sequence; and determining a distance between the first electronic device and the second electronic device based on the travel time. |
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16.09.2026 · Samsung Electronics Co., Ltd.
Verfahren und Vorrichtung zur Durchführung einer Leseoperation auf einem Speicherblock einer Speichervorrichtung
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Angemeldet am 14.08.2025
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Zusammenfassung
A method and an apparatus for performing a read operation on a memory block of a storage device. The method includes determining an optimal read level voltage for a current memory block, based on a failure of a read operation performed on the current memory block; performing, based on the optimal read level voltage determined for the current memory block, one of: determining a recalibrated read level voltage for an existing read level cluster among one or more existing read level clusters created previously for one or more memory blocks of the storage device; and creating a new read level cluster with respect to the optimal read level voltage; and performing, based on a subsequent read operation request for the current memory block, the read operation on the current memory block based on the recalibrated read level voltage or the new read level voltage. |
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16.09.2026 · Samsung Electronics Co., Ltd.
Systeme, Verfahren und Vorrichtungen zur Konfiguration eines Speicherzugriffsschalters auf der Basis des Durchsatzes
Software & Datenverarbeitung
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Status
Angemeldet am 02.03.2026
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Vertretung
Zusammenfassung
A method may include accessing, by at least one host, using a first memory access link between a switch and a first memory device, data at the first memory device, and transferring, based on a throughput of the first memory device, using a second memory access link between the switch and a second memory device, a portion of the data from the first memory device to the second memory device. The method may further include accessing, by the at least one host, using the second memory access link, the portion of the data at the second memory device. The method may further include selecting, based on the throughput of the first memory device, one of the at least one host to perform the transferring. |
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