Vorrichtung und Verfahren für Integrierte Geräte mit Vertraulicher Rechenunterstützung durch eine Vertrauenswürdige Ausführungsumgebung (vau)

Details

Veröffentlichungs-Nr.

EP4749501

Anmeldetag

10. November 2025

Veröffentlichung

27. Mai 2026

Rechtsraum

EP

IPC

G06F21/85, G06F21/53

Abstract

An apparatus and method for extending IO device security protocols to integrated processors. For example, an example processor package comprises: a plurality of cores to execute instructions; an interconnect fabric coupled to the plurality of cores; memory interface circuitry coupled to the interconnect fabric, the memory interface circuitry to couple the plurality of cores to one or more memories; a root complex comprising: security circuitry operable as a root of trust (RoT) and a bridge to the interconnect fabric, the security circuitry to establish secure communication with one or more Root Complex Integrated Endpoint (RCiEP) devices integral to the processor package; and a Security Protocol and Data Model (SPDM) engine of the security circuitry to provide RCiEP encryption and SPDM protocol services to establish secure communication channels with each RCiEP device.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA