Zweiweg-Phasenregelkreis
Anmelder: NXP USA, Inc. 🇺🇸
Details
- Veröffentlichungs-Nr.
- EP4749928
- Anmeldetag
- 6. November 2025
- Veröffentlichung
- 27. Mai 2026
- Rechtsraum
- EP
- IPC
- H03L7/089, H03L7/093
Abstract
A dual-path phase-locked loop (PLL) is disclosed. The dual-path PLL converts, based on a masking value, a pulse signal to a masked pulse signal such that the masked pulse signal comprises one or more unmasked pulses and one or more masked pulses of the pulse signal. An integral current is generated, based on the masked pulse signal in a manner such that that an average current value of the integral current reaches a desired value over a predefined number of cycles of the pulse signal and an optimal peaking in the dual-path PLL is achieved.
Anmelder
- Firma
- NXP USA, Inc.
- Land
- 🇺🇸 USA
US-amerikanische Gesellschaft des Halbleiterkonzerns NXP, die Chips und Halbleiterlösungen für Automobiltechnik, Kommunikation und Industrieelektronik entwickelt.
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