Stromspiegel, Gatetreiber und Verfahren zur Steuerung eines Ausgangsstroms

Details

Veröffentlichungs-Nr.

EP4752673

Anmeldetag

29. November 2024

Veröffentlichung

3. Juni 2026

Rechtsraum

EP

IPC

G05F3/26, H03F3/45

Abstract

A current mirror circuit (200) comprises: a first current source (206) for providing a first reference current (IB1); a first transistor (M1, 222) having a control terminal (226), a first current terminal (228) coupled to receive the first reference current (IB1), and a second current terminal (230) coupled to a reference potential (VEE); a second transistor (M2, 224) having a control terminal (232) coupled to the control terminal (226) of the first transistor (M1, 222), a first current terminal (234) coupled to an output node (GL, 208) of the current mirror circuit (200), and a second current terminal (236) coupled to the reference potential (VEE); and matching circuitry (300) having an input (302) coupled to the output node (GL, 208) of the current mirror circuit (200), and an output (304) coupled to the first current terminal (228) of the first transistor (M1, 222), the matching circuitry (300) being configured to provide, at the first current terminal (228) of the first transistor (M1, 222), a replica voltage corresponding to a voltage at the output node (GL, 208) of the current mirror circuit (200).

Anmelder

Firma

NXP USA, Inc.

Land

🇺🇸 USA