Schmütz, Christian Klaus Johannes

A system and method of detecting fault in current sensing of an electric motor controller including a current imbalance detector and a fault detector. The electric motor controller includes a control loop using feedback current values for generating phase current signals driving an electric motor, a current sensor that provides sensed current signals indicative yet independent of the phase current signals, and an estimator that monitors operating parameters of the electric motor and provides estimated current signals. Imbalance occurs when a sum of sensed current signals is outside a threshold of a constant value. The fault detector uses the sensed current signals and the estimated current signals to determine phase criteria markers indicative of phase symmetry and compares each phase criteria marker with an average criteria marker to identify a faulty phase current sensor. The criteria markers are based on deviations between sensed and estimated current signals in each phase.

An integrated circuit for an automotive bus system, comprising: a die; a reference terminal; an input terminal, wherein the reference terminal is spaced apart from the input terminal; and a routing path that comprises an electrostatic discharge mitigation circuit and also provides a galvanic connection between the input terminal and the reference terminal. The routing path comprises a conductive trace on the die; the conductive trace comprises a plurality of sections; the plurality of sections is arranged such that, in use, a first section has a current flow in a first direction, and a second section has a current flow in a second direction; the first direction is opposite to the second direction; and the first section is positioned adjacent to the second section, such that the first and second sections are inductively or electro-magnetically coupled to each other when the current flows through the first and second sections.

The present disclosure relates to a method of providing an early warning of thermal runaway in a battery cell, the method comprising: monitoring, over time, a temperature of the battery cell; monitoring, over time, a real part of an impedance of the battery cell for a plurality of test signal frequencies by: applying a plurality of test signals to the battery cell at each of a plurality of discrete time intervals, each of the plurality of test signals having a corresponding one of the plurality of test signal frequencies; and determining, for each applied test signal, the real part of the impedance of the battery cell; determining, over time, whether the temperature of the battery cell is increasing; determining, over time, whether the real parts of the impedances corresponding to the plurality of test signal frequencies have converged; and providing a first warning if the real parts of the impedances at the plurality of test signal frequencies have converged and the temperature has been increasing for a first predetermined number of the discrete time intervals.

An integrated patch antenna with a plurality of layers, comprising: a reference plane, positioned in a first layer, wherein the reference plane is configured to provide a connection to a reference voltage; a driving patch, positioned in a second layer, wherein the first layer is separated from the second layer by a plurality of layers, such that: the driving patch is positioned above the reference plane, a volume between the reference plane and the driving patch defines a first resonant cavity, and the integrated patch antenna comprises a plurality of layers within the first resonant cavity. The integrated patch antenna also comprises a feed line configured to connect the driving patch to a transmitter or receiver, comprising: a first conductive via positioned in the first resonant cavity, galvanically connected to the driving patch; and a first conductive trace, galvanically connected to the first conductive via.

The present disclosure relates to a communication device, wherein the communication device is configured to receive a CAN frame via the CAN interface, the CAN frame comprises a first stream packet comprising a first stream data field and a first header, which comprises a plurality of common header fields and a plurality of first header fields, wherein the processing unit is configured to create a second stream packet corresponding to the first stream packet except for the first header fields, such that the second stream packet comprises the first stream data field and a second header comprising the common header fields and, in place of the first header fields, at least one second header field, wherein the processing unit is configured to create an Ethernet frame comprising the second stream packet as a payload, wherein the processing unit is configured to create a destination MAC address and a source MAC address of the Ethernet frame based on at least one of the plurality of first header fields, and wherein the communication device is configured to send the Ethernet frame via the Ethernet interface.

The present invention relates to a Controller Area Network, CAN, device comprising: a data, RD, interface, a processing unit, and a bus interface for coupling to a CAN bus, wherein the CAN device is configured to receive first data via the RD interface, wherein the processing unit is configured to create a series of CAN frames referred to as a frame series based on the first data such that the frame series comprises a start CAN frame and at least one further CAN frame referred to as at least one follower CAN frame, wherein the processing unit is configured to distribute the first data among the CAN frames of the frame series, wherein the processing unit is configured to create the start CAN frame such that the start CAN frame comprises an identifier that represents a priority value referred to as the start priority value within a predefined first value range, wherein the processing unit is configured to create each follower CAN frame such that each follower CAN frame comprises a respectively associated identifier that represents a priority value referred to as a follower priority value within a predefined second value range, wherein the second value range is less than the first value range, and wherein the CAN device is configured to transmit the CAN frames of the frame series via the CAN interface such that the at least one follower CAN frame follows the start CAN frame.

An ESD circuit includes a clamp that can be used for both discharging ESD current and for over voltage protection. The integrated circuit includes a signal IC terminal that is coupled to the clamp through a resistor circuit. In response to an over voltage condition of the signal IC terminal, the clamp becomes conductive to make conducive a discharge path between the signal IC terminal and a supply voltage rail to conduct charge to reduce the over voltage condition. The discharge path is through the resistor and through the clamp. A transistor is coupled to the control terminal of the clamp and has a control input coupled to receive an ESD trigger signal. In response to a detected ESD event, the trigger circuit is asserted to make the transistor conductive to pull the voltage of the control terminal of the clamp towards a voltage of the supply voltage rail to make conductive the discharge path to discharge ESD current between the IC terminal and the supply voltage rail.

A data transfer system outputs a counter value indicating a node of a linked list corresponding to a first-in-first out (FIFO) buffer. A determination is made whether the sequence descriptor of the node in the linked list indicates to bypass a control path from an output of the FIFO buffer. Based on the determination that the control path is bypassed, outputting a request signal originating from sequence control logic of a sequence control system. Based on the determination that the control path is not bypassed outputting a request signal from a request output of the FIFO buffer. The data transfer is then performed by a direct memory access (DMA) channel.

A frame structure is described for aggregated data over a half-duplex serial data channel. In an example a serial link modem includes a transmit modem coupled to a serial channel and configured to send serial data through the serial channel, and an aggregator coupled to the transmit modem and configured to form a first frame type of serial data configured for data other than Universal Serial Bus (USB) data having an upstream packet and a downstream packet and a total length of less than a latency of two USB hubs, and a second frame type of serial data configured for USB data, wherein the aggregator forms the second frame type upon receiving USB data and wherein the transmit modem is configured to transmit the first frame type through the serial channel, and to transmit the second frame type through the serial channel upon completion of transmitting the first frame.

Embodiments of a repeater, an embedded Universal Serial Bus (eUSB) repeater, and a method of operating a repeater are disclosed. In an embodiment, a repeater includes a buffer configured to store data that is received during a time distance between an input start and a frame slot start, a counter configured to calculate a waiting time before starting frame transmission, and a transmitter configured to transmit predefined data at the frame slot start over a repeater channel and to transmit the data that is stored in the buffer over the repeater channel after the waiting time from the frame slot start.