Herstellungsverfahren für einen Halbleiterchip und Halbleiterchip mit Integrierter Dti-Struktur und Säulenkondensator

Details

Veröffentlichungs-Nr.

EP4757525

Anmeldetag

2. Dezember 2025

Veröffentlichung

10. Juni 2026

Rechtsraum

EP

Abstract

Method for manufacturing a semiconductor die (1), comprising the steps of: arranging a semiconductor body (2) having a front side (2a) and a back side (2b) opposite to each other; concurrently forming, through part of the semiconductor body (2), a first trench (6) and a second trench (8), having respective side walls (6a, 8a) and bottom wall (6b, 8b); forming, at the side walls (6a) and the bottom wall (6b) of the first trench (6), a first insulation layer (12) having a first thickness (t1); forming, at the side walls (8a) and the bottom wall (8b) of the second trench (8), a second insulation layer (26) having a respective second thickness (t4) lower than the first thickness (t1); and filling the first and the second trenches (6, 8) with a conductive material layer (32).

Anmelder

Firma

STMicroelectronics International N.V.

Land

🇨🇭 Schweiz