Silizium-Auf-Isolator-Substrat und Verfahren zu Seiner Herstellung

Details

Veröffentlichungs-Nr.

EP4757571

Anmeldetag

22. Oktober 2025

Veröffentlichung

10. Juni 2026

Rechtsraum

EP

IPC

H10P90/00, H10P14/60

Abstract

In a method of forming an SOI substrate, a stopper layer having an etch selectivity different from a first wafer may be formed on the first wafer having a first surface and a second surface facing each other. A semiconductor layer having an etch selectivity different from the stopper layer may be formed on the stopper layer. A buried insulation layer may be formed on the semiconductor layer. The buried insulation layer may be formed by applying a compressive stress condition, to have a height of a central portion of the buried insulation layer being formed higher than a height of an edge portion of the buried insulation layer.

Anmelder

Firma

SK hynix Inc.

Land

🇰🇷 Südkorea