Esd (elektrostatische Entladung) Verifikation für Grosse Io (eingang/ausgang)-Arrays

Details

Veröffentlichungs-Nr.

EP4764939

Anmeldetag

24. November 2025

Veröffentlichung

24. Juni 2026

Rechtsraum

EP

IPC

G06F30/398, // G01R31/00

Abstract

A test system performs ESD (electrostatic discharge) verification of a circuit definition. The system performs a bottom-up ESD analysis to generate a verified IO (input/output) instance, and then performs a top-down ESD analysis based on multiple instances of the verified IO instance. The system generates an ESD verification model 10 instance with ESD protection circuitry and the ESD victim circuitry as separate cells at the same level of verification hierarchy, and verifies the model IO instance at a worst case connection test case. The system then scales out the IO instance into an array of instances to verify ESD protection between the model IO instances.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA