Halbleiteranordnung mit einem Gewickelten Fingerelement
Anmelder: NXP USA, Inc. 🇺🇸
Details
- Veröffentlichungs-Nr.
- EP4766136
- Anmeldetag
- 18. Dezember 2025
- Veröffentlichung
- 24. Juni 2026
- Rechtsraum
- EP
Abstract
An integrated circuit device is disclosed which has a substrate layer with input and output terminals and an array of FET elements formed over a top surface of the substrate layer, where each FET element includes an elongated source contact with opposed sides extending longitudinally between a first source end that is proximate to the output terminal layer and a second source end that is proximate to the input terminal; a U-shaped drain contact positioned to enclose the first source end and located to define a U-shaped channel region between the elongated source contact and the U-shaped drain contact; and a U-shaped gate contact positioned over the U-shaped channel region and between the U-shaped drain contact and the elongated source contact, where the U-shaped gate contact and U-shaped drain contact each have a closed end located in the peripheral ancillary region between the first source end and the output terminal.
Anmelder
- Firma
- NXP USA, Inc.
- Land
- 🇺🇸 USA
US-amerikanische Gesellschaft des Halbleiterkonzerns NXP, die Chips und Halbleiterlösungen für Automobiltechnik, Kommunikation und Industrieelektronik entwickelt.
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