Beschleunigter Abdeckungsabschluss in Hardware-Designs unter Verwendung Hierarchischer Prüfstände

Details

Veröffentlichungs-Nr.

EP4769201

Anmeldetag

22. Dezember 2025

Veröffentlichung

1. Juli 2026

Rechtsraum

EP

IPC

G06F30/33

Abstract

Improved hardware design testing techniques qualify a current design by integrating select tests completed on prior design iterations. A product design may be divided into design unit subcomponents, and multiple test benches may individually be configured to test different groups of subcomponents. The test benches may be run on a series of iterations of an evolving product design. Qualification of a most recent current iteration of the product design can be simplified by incorporating some test results from tests performed on prior iteration checkpoints of the design into the qualification of the current design by first combining test results across time for each test bench, and then combining test results across the set of test benches.

Anmelder

Firma

Microsoft Technology Licensing, LLC

Land

🇺🇸 USA

Fachgebiete