Halbleitervorrichtung und Verfahren zu deren Herstellung

Details

Veröffentlichungs-Nr.

EP4770305

Anmeldetag

27. November 2025

Veröffentlichung

1. Juli 2026

Rechtsraum

EP

Abstract

A method for fabricating a semiconductor device including high-integrated memory cells and the semiconductor device is provided. The method includes forming a horizontal arrangement of nano sheet target patterns over a substrate, wherein the nano sheet target patterns include initial sheets that are horizontally oriented and sheet expansion tabs disposed on both sides of each of the initial sheets; performing a surface treatment on the nano sheet target patterns to form a horizontal arrangement of narrow sheets and nano sheet dielectric layers, each of the nano sheet dielectric layers surrounding a different one of the narrow sheets; and forming a horizontal conductive line on the nano sheet dielectric layers, the horizontal conductive line surrounding the narrow sheets.

Anmelder

Firma

SK hynix Inc.

Land

🇰🇷 Südkorea