Mehrschwelliges Dielektrisches Gate-Strukturierungsschema mit Individualisierten Gate-Wannen

Details

Veröffentlichungs-Nr.

EP4770327

Anmeldetag

26. November 2025

Veröffentlichung

1. Juli 2026

Rechtsraum

EP

Abstract

Integrated circuit (IC) devices having gate-all-around (GAA) transistors. An IC device may include adjacent GAA transistors with gate electrodes having different gate dielectric stacks separated by a dielectric wall. The gate dielectric stacks may include inner gate dielectric layers on nanoribbon channels and outer gate dielectric layers on the inner gate dielectric layers. The inner gate dielectric layers of the adjacent transistors may have different thicknesses or material compositions. The outer gate dielectric layers of the adjacent transistors may have different thicknesses or material compositions. The dielectric wall between gate electrodes and gate dielectric stacks may enable independent processing of the transistors gates by dividing the nanoribbon channels into separate gate tubs.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA