Herstellung von Integrierten Gate-All-Around-Schaltungsstrukturen mit Gate-Dielektrika mit Unterschiedlicher Übergangsschichtdicke

Details

Veröffentlichungs-Nr.

EP4770331

Anmeldetag

24. November 2025

Veröffentlichung

1. Juli 2026

Rechtsraum

EP

Abstract

Gate-all-around integrated circuit structures having gate dielectrics with differentiated transition layer thickness are described. For example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires or fin and a second vertical arrangement of horizontal nanowires or fin. A first gate stack is over the first vertical arrangement of horizontal nanowires or fin, where the first gate stack is an NMOS gate stack having a gate electrode over a gate dielectric, the gate dielectric having a transition layer comprising silicon and oxygen and having a first thickness. A second gate stack is over the second vertical arrangement of horizontal nanowires or fin, where the second gate stack is a PMOS gate stack having a gate electrode over a gate dielectric, the gate dielectric having a transition layer comprising silicon and oxygen and having a second thickness greater than the first thickness.

Anmelder

Firma

INTEL Corporation

Land

🇺🇸 USA