Durchführung von Registerspeicheroperationen

Details

Veröffentlichungs-Nr.

EP4776124

Anmeldetag

9. Januar 2025

Veröffentlichung

15. Juli 2026

Rechtsraum

EP

IPC

G06F9/30

Abstract

Methods are provided of performing register-memory operations in a computer system including a processor with vector-registers, a memory, a cache with cache line-size and a bus with bus-width. These methods comprise: receiving a vector store instruction to transfer from vector-registers to memory a vector of elements, each element having an element length, ELEN; partitioning the vector store instruction into vector-region store instructions each defining a vector-region to be stored, each vector-region having a region length, RLEN, greater than the ELEN and a memory length, MLEN, equal to the cache line-size or the bus-width; buffering the vector-region store instructions so that each remains buffered until conditions enabling its execution are fulfilled; and performing, for each of the vector-region store instructions once released from the buffering, transfer from vector-registers to memory of the vector-region defined in/by the vector-region store instruction. Systems and computer programs suitable for performing said methods are also provided.

Anmelder

Firma

Semidynamics Technology Services, S.L.

Land

🇪🇸 Spanien

Fachgebiete