Halbleiteranordnung

Details

Veröffentlichungs-Nr.

EP4776787

Anmeldetag

8. August 2025

Veröffentlichung

15. Juli 2026

Rechtsraum

EP

Abstract

A semiconductor device includes a channel layer (132), a barrier layer (136) on the channel layer (132), a gate electrode layer (155) on the barrier layer (136) and extending in a first direction (D1) parallel to an upper surface of the barrier layer (136), a gate semiconductor layer (152) between the barrier layer (136) and the gate electrode layer (155), a source electrode (173) and a drain electrode (175) connected to the channel layer (132) and spaced apart from the gate electrode layer (155) in a second direction (D2) parallel to the upper surface of the barrier layer (136) and different from the first direction (D1), and a first barrier layer doping region (1361) within the barrier layer (136) and connected to the source electrode (173). In a cross-section in the second direction (D2) and in a third direction (D3) perpendicular to the upper surface of the barrier layer (136), an upper surface length of the gate electrode layer (155) is less than a lower surface length of the gate electrode layer (155).

Anmelder

Firma

SAMSUNG ELECTRONICS CO., LTD.

Land

🇰🇷 Südkorea