Verfahren zum Schutz der Facette Während des Zusammenbaus in einem Optischen Motor

Details

Veröffentlichungs-Nr.

EP4779376

Anmeldetag

14. Januar 2026

Veröffentlichung

22. Juli 2026

Rechtsraum

EP

IPC

G02B6/42

Abstract

One or more embodiments provide a method for manufacturing a semiconductor device. The method includes preparing a wafer having a first surface coupled to a carrier wafer and a second surface opposite the first surface, and mounting a semiconductor chip stack on the second surface of the wafer. The mounting is performed such that an optical interface of the semiconductor chip stack is above a peripheral region on the second surface of the wafer. The method further includes forming a photoresist pattern to cover a peripheral region of the second surface and a region of the semiconductor chip stack that includes the optical interface, forming a mold in a space surrounded by the photoresist pattern, grinding the mold such that the semiconductor chip package is exposed, removing the photoresist pattern after grinding the second, and removing the carrier wafer from the first surface of the wafer.

Anmelder

Firma

Avago Technologies International Sales Pte. Limited

Land

🇸🇬 Singapur

Fachgebiete