Verfahren und Systeme zur Bereitstellung einer Programmierbaren Verzögerung zur Versatzanpassung und -Synchronisation

Details

Veröffentlichungs-Nr.

EP4787712

Anmeldetag

27. Januar 2026

Veröffentlichung

5. August 2026

Rechtsraum

EP

IPC

H03L7/081, G06F1/10, H04L7/00

Abstract

The present invention generally relates to programmable delay generation techniques, and more specifically, to methods and systems for providing programmable delay for skew adjustment and lane synchronization in high-speed communication systems. A device for generating and aligning clock signals across multiple lanes in a high-speed communication system is disclosed. The device includes a controller providing control signals and a phase-locked loop generating a first clock signal. A first lane within a plurality of lanes comprises a first clock generator producing a first signal pair based on the first clock signal and a phase interpolator generating a second clock signal using the first signal pair and the control signals. The device further includes a circuit coupled to the lanes and configured to align their outputs for synchronization. There are other embodiments as well.

Anmelder

Firma

Avago Technologies International Sales Pte. Limited

Land

🇸🇬 Singapur

Fachgebiete