Halbleiterspeicheranordnung

Details

Veröffentlichungs-Nr.

EP4788079

Anmeldetag

19. November 2025

Veröffentlichung

5. August 2026

Rechtsraum

EP

IPC

H10B12/00

Abstract

A semiconductor memory device may include: a substrate; a plurality of semiconductor patterns extending in a first horizontal direction on the substrate, the plurality of semiconductor patterns spaced apart from each other in a vertical direction; a first contact connected to the plurality of semiconductor patterns, the first contact extending through the plurality of semiconductor patterns in the vertical direction; a bit line on the first contact in the vertical direction, the bit line extending in a second horizontal direction crossing the first horizontal direction; a word line surrounding the plurality of semiconductor patterns, the word line extending in the first horizontal direction; and a second contact spaced apart from the first contact in the first horizontal direction, the second contact extending through the plurality of semiconductor patterns in the vertical direction, wherein the second contact includes a metal, and the first contact includes a main layer including doped polysilicon.

Anmelder

Firma

Samsung Electronics Co., Ltd.

Land

🇰🇷 Südkorea

Fachgebiete