Umgehung eines Kontrollpfades zu einem Anforderungssignalausgang eines Fifo-Puffers zur Datenübertragung im Zusammenhang mit einer Direktspeicherzugriffsoperation
EP4790562
12. August 2026
Anmelder: NXP USA, Inc 🇺🇸
Details
- Veröffentlichungs-Nr.
- EP4790562
- Anmeldetag
- 20. Januar 2026
- Veröffentlichung
- 12. August 2026
- Rechtsraum
- EP
- IPC
- G06F13/28
Abstract
A data transfer system outputs a counter value indicating a node of a linked list corresponding to a first-in-first out (FIFO) buffer. A determination is made whether the sequence descriptor of the node in the linked list indicates to bypass a control path from an output of the FIFO buffer. Based on the determination that the control path is bypassed, outputting a request signal originating from sequence control logic of a sequence control system. Based on the determination that the control path is not bypassed outputting a request signal from a request output of the FIFO buffer. The data transfer is then performed by a direct memory access (DMA) channel.
Anmelder
- Firma
- NXP USA, Inc
- Land
- 🇺🇸 USA