Speichervorrichtung und Programmbetrieb dafür

Details

Veröffentlichungs-Nr.

EP4790712

Anmeldetag

28. November 2023

Veröffentlichung

12. August 2026

Rechtsraum

EP

IPC

G11C16/32

Abstract

In certain aspects, a memory device includes memory strings each including a drain select gate (DSG) transistor, memory cells, and a source select gate (SSG) transistor, and a peripheral circuit coupled to the memory strings. The peripheral circuit is configured to, in a program operation, program a select memory cell of the memory cells in a select memory string of the memory strings, and inhibit an unselect memory cell of the memory cells in an unselect memory string of the memory strings. The peripheral circuit includes a word line driver configured to in a pre-pulse period and a post-pulse period in a first loop of the program operation, turn off the DSG transistor in the unselect memory string, and in at least one of a pre-pulse period or a post-pulse period in a second loop of the program operation after the first loop, turn on the DSG transistor in the unselect memory string.

Anmelder

Firma

Yangtze Memory Technologies Co., Ltd.

Land

🇨🇳 China

Fachgebiete