Verpackungssubstrat mit einer Plattierungsschicht und Halbleitergehäuse damit

Details

Veröffentlichungs-Nr.

EP4791179

Anmeldetag

31. Oktober 2025

Veröffentlichung

12. August 2026

Rechtsraum

EP

IPC

H10W70/655, H10W72/59

Abstract

A package substrate includes wirings on a substrate body. Each wiring includes a substrate pad in a boding finger region of the substrate body and a connected trace extending into a chip mounting region of the substrate body. Plating layers are respectively disposed on the substrate pads. Disposed on the substrate body are first and second residual sections of a first plating inlet line respectively connected to first and second traces. An insulating layer covers the first and second traces and residual sections. The insulating layer includes a first opening through which the first and second plating layers are exposed and includes a second opening separating the first residual section from the second residual section. The first trace includes a recessed section on a side facing the second trace, and the second opening is disposed within the recessed section.

Anmelder

Firma

SK hynix Inc.

Land

🇰🇷 Südkorea

Fachgebiete