Musterungsverfahren zur Verwendung in der Halbleiterverarbeitung

Details

Veröffentlichungs-Nr.

EP4797326

Anmeldetag

20. Februar 2025

Veröffentlichung

26. August 2026

Rechtsraum

EP

Abstract

The method comprises the steps of producing a stack of at least two layers (30,31,32) on a support substrate (25), by lithography and anisotropic etching, producing an opening (33) through said stack of at least two layers, and thereafter applying at least a first directional etching process step, using an etch beam configured to remove the material of one or more upper layers (32) of the stack selectively with respect to the layer or layers (30,31) directly underneath said one or more upper layers, to thereby enlarge the opening in the one or more upper layers (32) while essentially maintaining the in-plane dimensions of the opening in the layer or layers (30,31) directly underneath the one or more upper layers (32). The method can be applied to a stack of several layers which can be enlarged stepwise with respect to further underlying layers of the stack. Directional etching can be done in two opposite directions, possibly applying different etch chemistries in the two directions, to thereby enable the creation of complex three-dimensional structures without requiring expensive multiple lithography steps.

Anmelder

Firma

Imec VZW

Land

🇧🇪 Belgien