Frequenzverdoppelungsschaltung

Details

Veröffentlichungs-Nr.

EP4800921

Anmeldetag

28. Februar 2025

Veröffentlichung

2. September 2026

Rechtsraum

EP

IPC

H03B19/14

Abstract

The disclosure relates to a frequency doubler circuit (100) comprising: first and second input terminals (101, 102) for receiving an input voltage signal (IN+, IN-) at a first frequency; a first pair of transistors (103a, 103b) connected between a supply line (104) and a first node (105); a second pair of transistors (106a, 106b) connected between a common line (107) and a second node (108), the first and second pairs of transistors (103a, 103b, 106a, 106b) having gates coupled to the respective first and second input terminals (101, 102); an output matching circuit (109) having first and second output terminals (110, 111) for providing an output voltage signal (OUT+, OUT-) at a second frequency; a first common gate transistor (112) connected between the first node (105) and a first input (113) of the output matching circuit (109); and a second common gate transistor (114) connected between the second node (108) and a second input (115) of the output matching circuit (109).

Anmelder

Firma

NXP B.V.

Land

🇳🇱 Niederlande

Fachgebiete