Volumeneinschlussvorhersagemodell für Waferschneidetechnologie

Details

Veröffentlichungs-Nr.

EP4808338

Anmeldetag

12. Februar 2026

Veröffentlichung

16. September 2026

Rechtsraum

EP

IPC

H10P74/00, // H10P74/20

Abstract

A system and method reliably sort wafers as suitable or unsuitable for processing. A plurality of first test wafers are initially sliced from a semiconductor ingot. A first surface analysis process is performed on each of the first test wafers to generate first surface defect data. A plurality of second test wafers are formed from the first test wafers by bonding the first test wafers to respective substrates. A second surface analysis process is then performed on the second test wafers to generate second surface defect data. A wafer sorting model is generated from the first and second surface defect data. Subsequently, embodiments of the present disclosure utilize the model to sort wafers after performing the first surface analysis process on the wafers.

Anmelder

Firma

STMicroelectronics International N.V.

Land

🇨🇭 Schweiz

Fachgebiete