Integrierte Schaltungspackungen mit Erdverpaartem Teilweisem Anschlussflächen-Vertikalverbindungszugang
Anmelder: INTEL Corporation 🇺🇸
Details
- Veröffentlichungs-Nr.
- EP4812009
- Anmeldetag
- 18. Dezember 2025
- Veröffentlichung
- 23. September 2026
- Rechtsraum
- EP
- IPC
- H10W70/63, H05K1/11
Abstract
Disclosed herein is an integrated circuit (IC) substrate having PTH partial via pads, as well as related assemblies, structures, and methods. In some embodiments, an IC substrate may include a first surface and an opposing second surface; a through hole extending from the first surface to the second surface and having a first sidewall portion and an opposing second sidewall portion; a first conductive material, extending between the first and second surfaces, on the first sidewall portion; a second conductive material, extending between the first and second surfaces, on the second sidewall portion; a third conductive material, at the first surface, coupled to the first conductive material and extending outwards; and a fourth conductive material, at the first surface, coupled to the second conductive material and extending outwards, wherein the first and the third conductive materials are physically separated from the second and the fourth conductive materials.
Anmelder
- Firma
- INTEL Corporation
- Land
- 🇺🇸 USA
US-amerikanischer Halbleiterhersteller mit Sitz in Kalifornien. Entwickelt und produziert Prozessoren, Chipsätze sowie weitere Halbleiterkomponenten für Computer, Server und eingebettete Systeme.
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