Statischer Multiport-Direktzugriffsspeicher

Details

Veröffentlichungs-Nr.

EP4814962

Anmeldetag

18. März 2026

Veröffentlichung

30. September 2026

Rechtsraum

EP

IPC

G11C8/16, G11C7/06

Abstract

An example memory circuit can include: a memory cell coupled to a first word line, a second word line, a first bit line, and a second bit line, the first word line selectively coupling the memory cell to the first bit line, the second word line selectively coupling the memory cell to the second bit line; a first sense amplifier coupled to the first bit line and a reference voltage, the first sense amplifier configured to compare voltage of the first bit line to the reference voltage; and a second sense amplifier coupled to the second bit line and the reference voltage, the second sense amplifier configured to compare voltage of the second bit line to the reference voltage.

Anmelder

Firma

Avago Technologies International Sales Pte. Limited

Land

🇸🇬 Singapur

Fachgebiete