Mehrprotokoll-Ein-/ausgabe (i/o)-Kommunikation

Details

Veröffentlichungs-Nr.

EP4815382

Anmeldetag

26. März 2026

Veröffentlichung

30. September 2026

Rechtsraum

EP

IPC

H04L25/49, // H04L25/03

Abstract

Systems or methods of the present disclosure may provide transmit circuitry that receives one or more input signals and an enable signal, the enable signal indicating whether a three-level communication scheme is enabled, and generates one or more data signals based on the one or more input signals and the enable signal. Equalization circuitry receives the one or more data signals and selectively generates a first set of equalization voltages based on the one or more data signals indicating the three-level communication scheme or selectively generates a second set of equalization voltages based on the one or more data signals not indicating the three-level communication scheme.

Anmelder

Firma

Altera Corporation

Land

🇺🇸 USA

Fachgebiete