Dual-Gate Ldmos Vorrichtungen für Gate-All-Around Prozessabläufe

EP4819794 7. Oktober 2026

Anmelder: Avago Technologies International Sales Pte. Limited 🇸🇬

Details

Veröffentlichungs-Nr.
EP4819794
Anmeldetag
1. April 2026
Veröffentlichung
7. Oktober 2026
Rechtsraum
EP
Offizieller Volltext

Abstract

In an embodiment, a transistor has a semiconductor layer with a first-type region and a second-type region adjacent to the first-type region. An insulating structure extends into the second-type region. A first conductor is on the first-type region. A second conductor is on the second-type region. A first gate structure is on the semiconductor layer between the first and second conductor. The first gate structure includes semiconductive layers that are vertically spaced from each other and a first gate metal that contacts the semiconductive layers. A second gate structure is on the semiconductor layer between the first gate structure and the second conductor. The second gate structure includes semiconductive layers that are vertically spaced from each other. The second gate structure further includes a second gate metal that contacts the semiconductive layers of the second gate structure.

Anmelder

Firma
Avago Technologies International Sales Pte. Limited
Land
🇸🇬 Singapur
🇸🇬 Avago Technologies International Sales

Singapurische Vertriebsgesellschaft des Halbleiterkonzerns Avago Technologies (heute Broadcom), tätig im internationalen Vertrieb von Halbleiterkomponenten für Kommunikations-, Industrie- und Speicheranwendungen.

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