Halbleiterbauelement mit Speicherknotenkontakten

Details

Veröffentlichungs-Nr.

EP4827261

Anmeldetag

26. Februar 2026

Veröffentlichung

21. Oktober 2026

Rechtsraum

EP

IPC

H10B12/00

Abstract

A semiconductor device includes: a bit line on a substrate and extending in a first direction parallel to an upper surface of the substrate; a semiconductor pattern on the bit line and extending in a direction perpendicular to the upper surface of the substrate; a gate electrode on a side surface of the semiconductor pattern and extending in a second direction intersecting the first direction; a storage node contact on an upper surface of the semiconductor pattern; an upper insulating layer covering a side surface of the storage node contact; and a capping pattern between the upper insulating layer and the gate electrode. The upper insulating layer is on an upper surface of the capping pattern. The upper surface of the semiconductor pattern and the upper surface the capping pattern each have a concave profile.

Anmelder

Firma

Samsung Electronics Co., Ltd.

Land

🇰🇷 Südkorea

Fachgebiete