Dreidimensionale Halbleiterspeichervorrichtung mit Überlappenden Kontakten und Elektronisches System damit

Details

Veröffentlichungs-Nr.

EP4827262

Anmeldetag

5. März 2026

Veröffentlichung

21. Oktober 2026

Rechtsraum

EP

Abstract

A three-dimensional semiconductor memory device includes a first peripheral circuit structure (PS1) and a second peripheral circuit structure (PS2) sequentially provided on a first substrate (10). The second peripheral circuit structure includes a second substrate (100) having a first surface (100a) and a second surface (100b) facing the first surface, a transistor array (TA) including transistors (TR2) on the first surface of the second substrate, an insulating layer (40) on the second surface of the second substrate, a conductive line (CL) extending in the insulating layer in a first direction parallel to the first surface of the second substrate, and a conductive contact (CT) between the conductive line and the second surface of the second substrate.

Anmelder

Firma

Samsung Electronics Co., Ltd.

Land

🇰🇷 Südkorea