Feldeffekttransistor und Verfahren dafür

EP3460852 Art B1 17. Juni 2020

Anmelder: NXP USA, Inc. 🇺🇸

Details

Veröffentlichungs-Nr.
EP3460852
Aktenzeichen
EP18187562
Anmeldetag
6. August 2018
Veröffentlichung
17. Juni 2020
Erteilung
17. Juni 2020
Rechtsraum
EP
IPC
H01L29/40H01L29/06H01L29/423H01L29/78H01L21/336
Offizieller Volltext

Abstract

A transistor includes a trench formed in a semiconductor substrate with the trench having a first sidewall and a second sidewall. A vertical field plate is formed in the trench and the vertical field plate is located between the first sidewall and the second sidewall. A gate electrode is formed in the trench with a first edge of the gate electrode proximate to the first sidewall and a second edge of the gate electrode proximate to the vertical field plate. A first dielectric material is formed in the trench between the first sidewall and the vertical field plate. A second dielectric material is formed in the trench between the vertical field plate and the second sidewall with the second dielectric material having a dielectric constant lower than that of the first dielectric material.

Anmelder

Firma
NXP USA, Inc.
Land
🇺🇸 USA
🇺🇸 NXP USA

US-amerikanische Gesellschaft des Halbleiterkonzerns NXP, die Chips und Halbleiterlösungen für Automobiltechnik, Kommunikation und Industrieelektronik entwickelt.

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