Volldifferentieller Cmos-Demodulator

Details

Veröffentlichungs-Nr.

EP4730648

Anmeldetag

18. Oktober 2024

Veröffentlichung

22. April 2026

Rechtsraum

EP

IPC

H03D1/18

Abstract

A fully differential CMOS demodulator includes a CMOS bias control circuit, a CMOS squarer rectifier, a CMOS summing circuit, at least one CMOS gain stage, and a CMOS mismatch control circuit. CMOS bias control circuit produces a bias signal that biases the other components. The CMOS squarer rectifier receives the reference voltage, a first modulated analog information signal, and a second modulated analog information signal and demodulates the first and second modulated analog information signals to produce differential demodulated information signals and average voltage levels of the differential demodulated information signals. The CMOS summing circuit sums the differential demodulated information signals and average voltage levels of the differential demodulated information signals to produce a differential demodulated information signal pair. The at least one CMOS gain stage amplifies the differential demodulated information signal pair, and the CMOS mismatch control circuit alters the differential demodulated information signal pair for offset compensation.

Anmelder

Firmen

NXP USA, Inc.
L'Università degli Studi di Catania (DIEEI)

Land

🇺🇸 USA