GlobalFoundries U.S.

The present disclosure relates to semiconductor structures and, more particularly, to seal ring structures and methods of manufacture. The structure includes: a trench structure in a GaN stack of material; an ohmic metal contacting an upper surface of the GaN stack of material on a side of the trench structure; and a seal ring structure vertically extending from and in contact with the ohmic metal, on a side of the trench structure.

Embodiments of the disclosure provide a structure with a plurality of integrated circuit (IC) modules. Each IC module of the plurality of IC modules having a device layer and a metal wiring stack thereon. The plurality of IC modules including a first IC module coupled to an inverted second IC module along a bonding interface. The bonding interface including an electrically insulative, thermally conductive layer.

An integrated circuit (IC) structure. The structure includes: a substrate; an inductor positioned adjacent the substrate; and an electrically switchable ground shield positioned between the inductor and the substrate, wherein the electrically switchable ground shield is controlled by a transistor.

A high electron mobility transistor (HEMT) includes a substrate including a stack of layers including a channel layer, a barrier layer on the channel layer and a two-dimensional electron gas (2DEG) region in the channel layer. An active gate is on the substrate, a drain region is laterally to a first side of the active gate, and a source region is laterally to a second, opposite side of the active gate. A gate contact is electrically coupled to the active gate and extends laterally past at least one edge of the active gate and overlaps the 2DEG region. The gate contact provides heat dissipation and a gate-connected field plate for electric field shaping.

A system for developing a design in an advanced semiconductor-on-insulator processing technology includes a process design kit (PDK). A cell library in the PDK includes compact ancillary component cells placeable adjacent a functional block in a design layout. Some cells contain pairs of ancillary components including: a first ancillary component (e.g., a substrate diode) in a first hybrid area; a second ancillary component (e.g., a zero bias tap, a bias tap, or a signal antenna) in a second hybrid area; a first semiconductor-on-insulator area between the first and second hybrid areas and including less than five gate structures; and a second semiconductor-on-insulator area between the second hybrid area and functional block. Another cell contains a stand-alone signal antenna component and is placeable in the design layout between sections of a stacked memory-type functional block without requiring supporting cells. An IC structure can be manufactured according to such a design layout.

Structures for an optical switch and methods of forming such structures. The structure comprises a Mach-Zehnder interferometer including a first arm, a second arm, a first waveguide core section coupled to the first arm, and a second waveguide core section coupled to the second arm. The structure further comprises a first ring resonator and a second ring resonator. The first ring resonator is positioned between the first waveguide core section and the second ring resonator, and the second ring resonator is positioned between the second waveguide core section and the first ring resonator.

The present disclosure relates to semiconductor structures and, more particularly, to a contact strap extending to a common source/drain region of adjacent gate structures and methods of manufacture. The structure includes: a first gate structure; a second gate structure adjacent to the first gate structure; a common diffusion region to the first gate structure and the second gate structure; a trench lined with insulator material; and a contact strap extending within the trench and connecting to the common diffusion region.

The present disclosure relates to semiconductor structures and, more particularly, to a lateral heterojunction bipolar transistor (HBT) and methods of manufacture. The structure includes: a buried extrinsic base (20) within a semiconductor material (18); an intrinsic base (24) over and in electrical contact with the extrinsic base (20); an emitter (12) having a semiconductor material with a single crystalline orientation, the emitter being (12) above the intrinsic base (24) and comprising a faceted sidewall (12a); a collector (16) having the semiconductor material with the single crystalline orientation, the collector (16) being above the intrinsic base (24) and comprising a faceted sidewall (16a); and a spacer (14) between the emitter and the collector.

The present disclosure relates to an optical fiber positioning device and, more particularly, to an optical fiber positioning device and a method for attaching a fiber optic array to a photonic integrated circuit (PIC). The structure includes: a body having a first end and a second end; a dome shaped indicator provided on the body; a first positioning mark associated with the dome shaped indicator; and a second positioning mark under the first positioning mark and associated with the dome shaped indicator.

Structures for a Mach-Zehnder interferometer and methods of forming a structure for a Mach-Zehnder interferometer. The structure comprises a Mach-Zehnder interferometer including a first directional coupler, a second directional coupler, a first delay arm between the first and second directional couplers, and a second delay arm between the first and second directional couplers. The first delay arm includes a portion with a U-shape that surrounds a pocket, and the second delay arm includes a portion with a U-shape that extends into the pocket.