Imagination Technologies Patente

A method of rendering primitives is described. Vertex coordinates are converted from floating-point to fixed-point format and triangle primitives having non-zero area prior to the conversion and zero area after the conversion and primitives that have changed from line primitives to point primitives as a consequence of the conversion are identified. A flag is set for each identified primitive and triangle or line primitives that have changed to point primitives as a consequence of the conversion are marked as small objects. Tile lists for each tile in the rendering space are then generated by: for any primitive that is not flagged as a degenerate primitive, using one or more edge calculations to determine whether the primitive overlaps a tile; and for any primitive that is both marked as a small object and flagged as a degenerate primitive, using a conservative bounding box to determine whether the primitive overlaps a tile.

There is provided a hardware unit for outputting a value of frac(x), where frac(x) is defined as x - floor(x), wherein the hardware unit is configured to:receive an input floating-point number x having a mantissa (m) of bit width 'mw', an exponent (e) of bit width 'ew', a sign bit (s) and an exponent bias (bias); calculate power (x_pow) of the input floating-point number x, wherein x_pow= e-bias; compare the x_pow to (i) -1 and (ii) mw; and output the value of frac(x) ), wherein: the hardware unit is configured to output the value of frac(x), if the comparison indicates -1 ≤ x_pow <mw, by applying a mask to the input floating-point number x to generate a masked result, and renormalizing the masked result; and the hardware unit is configured to output the value of frac(x) if the comparison indicates input floating-point number x is negative and -(mw+2) <x_pow<-1, by negating the bits of the input floating-point number x, followed by steps of right shifting the negated number and rounding, wherein if the rounded value is 1, the output value of frac(x) is a value below 1, otherwise the output value of frac(x) is the rounded value.

A computer-implemented method of compressing a set of values, the method comprising: determining a matrix comprising the set of values; assessing a similarity between pairs of rows and/or pairs of columns of the matrix; reordering the rows and/or columns of the matrix in dependence on the similarity between the pairs of rows and/or pairs of columns so as to form a plurality of groups of values of the set of values; and compressing at least one group of values of the plurality of groups of values so as to compress the set of values.

There is provided a computer implemented method for quantising a ray representative to obtain a quantised ray representative, wherein the ray representative represents compressed ray data for a ray, the ray defined by three direction components and three position components, wherein the direction component having the greatest magnitude defines a major axis of the ray, wherein the ray representative comprises: (i) two translated position components defining a translated position along axes which are not the major axis of the ray and (ii) two rescaled direction components along axes which are not the major axis of the ray, the method comprising: decreasing a number of computational bits representing each of the two translated position components and the two rescaled direction components in the ray representative to thereby obtain the quantised ray representative, wherein the quantised ray representative comprises data that indicates the major axis of the ray, the two position components defining the translated position and the two rescaled direction components in fewer computational bits than data representing the ray representative.

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A processing system configured to process protected tasks, the processing system comprising: processing logic configured to process each of the protected tasks first and second times so as to generate, respectively, first and second processed outputs; a first fault detection unit operable in a mission mode in which it is configured to: compare the first and second processed outputs for a respective protected task; and generate a first signal indicative of whether said first and second processed outputs match; and a second fault detection unit operable in a mission mode in which it is configured to: compare the first and second processed outputs for the respective protected task; and generate a second signal indicative of whether said first and second processed outputs match; wherein the processing system is operable in a first protected mode in which: the first fault detection unit and the second fault detection unit operate, concurrently, in their respective mission modes; and the first signal and the second signal for the respective protected task are provided to a fault assessment unit for comparison in order to assess whether a fault existed at the first fault detection unit and/or the second fault detection unit when generating the first and second signals.

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