Probe- und Haltevorrichtung

Details

Veröffentlichungs-Nr.

EP2657940

Aktenzeichen

EP13161848

Anmeldetag

29. März 2013

Veröffentlichung

8. Mai 2019

Erteilung

8. Mai 2019

Rechtsraum

EP

IPC

G11C27/02

Abstract

A sample and hold circuit (100, 400) is provided. The circuit includes a plurality of switches (130-141, 430-453), a first capacitor (120, 420), an operational amplifier (110, 410) having a first input selectively coupled to the first capacitor (120, 420) and an output, a second capacitor (121, 421) and a third capacitor (122, 422) both selectively coupled to the first capacitor (120, 420) and both selectively coupled between the first input of the operational amplifier (110, 410) and the output of the operational amplifier (110, 410), wherein the plurality of switches are configured to receive a plurality of control signals such that the first capacitor (120, 420) is configured to sample an input signal in a sample phase and to transfer a charge to one of the second capacitor (121, 421) and the third capacitor (122, 422) in a hold phase, and the second capacitor (121, 421) and third capacitor (122, 422) are configured to alternate between holding the transferred charge and resetting in any back-to-back hold phases.

Anmelder

Firmen

NXP USA, Inc.
Freescale Semiconductor, Inc.

Land

🇺🇸 USA

Fachgebiete