Samsung Electronics

A semiconductor device includes a channel layer (132), a barrier layer (136) on the channel layer (132), a gate electrode layer (155) on the barrier layer (136) and extending in a first direction (D1) parallel to an upper surface of the barrier layer (136), a gate semiconductor layer (152) between the barrier layer (136) and the gate electrode layer (155), a source electrode (173) and a drain electrode (175) connected to the channel layer (132) and spaced apart from the gate electrode layer (155) in a second direction (D2) parallel to the upper surface of the barrier layer (136) and different from the first direction (D1), and a first barrier layer doping region (1361) within the barrier layer (136) and connected to the source electrode (173). In a cross-section in the second direction (D2) and in a third direction (D3) perpendicular to the upper surface of the barrier layer (136), an upper surface length of the gate electrode layer (155) is less than a lower surface length of the gate electrode layer (155).

Electronic device including first plate including first flat surface portion facing first direction, wherein first plate forms first surface of electronic device; second plate including second flat surface portion facing second direction opposite first direction, wherein second plate forms second surface of electronic device; side member including first metal part including first metallic material and forming at least part of third surface between first surface and second surface and second metal part including second metallic material, wherein second metal part is bonded with first metal part; and display disposed between first plate and the second plate so as to be shown through the first plate, wherein the first metal part and the second metal part form an interface including the first metallic material and the second metallic material, and wherein the interface is configured to face a third direction that is perpendicular to the first direction and the second direction.

Disclosed is a storage system, which includes a random access memory, a system power loss protection unit, a plurality of storage devices, and a processing unit that controls the random access memory, the system power loss protection unit, and the plurality of storage devices, and each of the plurality of storage devices assigns a persistent memory region (PMR) based on a capacity of the system power loss protection unit.

A method of image processing based on image restoration and a device for using the same are provided. The method includes segmenting a first original input image including a first background region and a first feature region into first patches, determining sampled patches by sampling background patches corresponding to the first background region preferentially over feature patches corresponding to the first feature region from the first patches, generating a first restored image by executing an image restoration model based on the sampled patches, and training the image restoration model to reduce a difference between the first original input image and the first restored image.

There is provided a compression method implemented by at least one hardware processor, including: acquiring attention data generated in a layer of a deep learning model based on an attention mechanism; converting a data format of the attention data into a converted data format, wherein a bit pattern of the attention data is maintained in converting the data format of the attention data into the converted data format; realigning, based on data characteristics of input data of the deep learning model, the attention data in the converted data format; and generating first compressed data by inputting the realigned attention data to an encoder model based on an artificial neural network.

A method and apparatus for generating data for training a machine-learning force field (MLFF) model are provided. The method of generating data for training the MLFF model includes generating product information based on received reactant information, generating labeled training data based on a density functional theory (DFT) calculation of the product information, identifying outlier data from verification data, based on an inference result of the verification data by the MLFF model trained based on the training data, and updating the training data based on the outlier data.

Provided is an image processing method. The method includes obtaining an input image, obtaining a sampling grid in which offset information is assigned to a predefined pixel grid, and applying the sampling grid to the input image to reconstruct pixels of the input image to generate a reconstructed image, wherein the offset information may include reconstruction location information for each pixel of the predefined pixel grid.

An electronic device includes a first housing part, a second housing part thinner than the first housing part, an asymmetric hinge structure rotatably connecting the second housing part to the first housing part, and a display disposed on the first housing part, the asymmetric hinge structure, and the second housing part. In a folded state of the first housing part and the second housing part, a portion of the display has an asymmetrical droplet shape that is more convex in a direction of the first housing part than a direction of the second housing part.

A semiconductor device includes a back interlayer insulating film (180); a plurality of first channel patterns (NS1) on the back interlayer insulating film (180) and spaced apart from each other in a vertical direction (DR3); a plurality of second channel patterns (NS2) on the back interlayer insulating film (180) and spaced apart from each other in the vertical direction (DR3); a source/drain pattern (160) between the first channel patterns (NS1) and the second channel patterns (NS2); and a source/drain contact (195, 295) connected to the source/drain pattern (160), wherein the source/drain pattern (160) includes a first layer (161) which comes into contact with (162) the first channel patterns (NS1) and the second channel patterns (NS2), a second layer (162) on or below the first layer (161), and a third layer (163) on or above the second layer (162), wherein a width of the first layer (161) in the vertical direction (DR3) decreases and then increases, along a direction from the first channel patterns (NS1) to the second channel patterns (NS2).

Embodiments of the disclosure relate to an electronic device including a flexible display. The electronic device may include a first housing, a second housing movably coupled to the first housing so as to allow the electronic device to transition between a slide-in state and a slide-out state, and a flexible display. The flexible display may include a display area, a first non-display area extending from the display area in a first direction, the first direction being a direction in which the flexible display moves when the electronic device transitions from the slide-out state to the slide-in state, and a second non-display area extending from the first non-display area in the first direction. The first non-display area may be an area in which a thin-film encapsulation layer having a structure in which an organic layer is disposed between two inorganic layers is formed, and the second non-display area may be an area in which a thin-film encapsulation layer having a structure in which the two inorganic layers are laminated is formed. The second non-display area may be positioned so as not to be included in the bending portion in any state of the electronic device.