Analog Devices

A low input-capacitance input stage, with wide common-mode and differential input voltage compliance, for a high voltage comparator or amplifier includes a first input transistor configured to receive a first portion of a differential input signal and provide a first portion of an output signal, and a second input transistor configured to receive a second portion of the differential input signal and provide a second portion of the output signal. The amplifier can include a degeneration stage. The degeneration stage can include first and second degeneration cascode circuits coupled in series. In an example, the first and second portions of the output signals can be provided using respective protection devices that are provided in cascode configuration with the first and second input transistors, respectively.

A switch control system for controlling a switch group, including two or more switches, to generate a switched output signal, including more than two discrete voltage levels, can include a sequencer, which can be configured to control respective on states and off states of one or more of the two or more switches to generate the switched output signal. This can include controlling the two or more switches through a specified sequence of switch states, where each switch state can include a respective state of one or more of the two or more switches. The switch states can include two or more power states, which can be configured for generating a portion of the switched output signal. The switch states can include one or more transition states, which can be configured for preventing at least one of shoot-through, a reverse current condition, or damage to the switch group when switching between power states.

A circuit for bi-directional communication between a master device and an isolated sensor. The circuit comprising a master-side conversion circuit operating at a master ground reference of the master device, the master-side conversion circuit configured to convert communications output from and input to the master device, a sensor-side conversion circuit operating at a sensor ground reference of the isolated sensor, the sensor-side conversion circuit configured to convert communications output from and input to the isolated sensor, and an isolation circuit positioned between the master-side conversion circuit and the sensor-side conversion circuit, the isolation circuit configured to power the isolated sensor by isolating the master ground reference from the isolated sensor ground reference during power transfer and data transfers between the master device and the isolated sensor.

A controlling amplifier may be configured to produce an amplified signal from an input signal and may have one input terminal configured to receive the input signal, another input terminal coupled to a zero current node, and an output terminal configured to output the amplified signal. A zero current circuit may be coupled to the zero current node, may comprise at least one capacitor comprising a first terminal coupled to the zero current node, and may be configured to force voltages across each at least one capacitor to zero. Some embodiments may include a servo amplifier circuit comprising a servo amplifier and a feedback, and the servo amplifier may have one input terminal coupled to the output terminal of the controlling amplifier and may have the feedback coupled between its other input terminal and its output terminal.

Described herein is a selective electrode membrane having an epoxy resin component, a hardener component, one or more polyurethanes, and a silica. The disclosure is also directed to a selective electrode having a substrate with a selective electrode membrane on a surface thereof, and methods of making the same.

A battery management system for managing both a high-voltage traction battery and a low-voltage electronics battery can include a network manager circuit. The network manager circuit can include a wireless transceiver, which can be configured to communicate wirelessly with a high-voltage battery monitor coupled to the high-voltage traction battery. The network manager circuit can also include a first wired interface, which can be configured to communicate with a low-voltage battery monitor coupled to the low-voltage electronics battery. The network manager circuit can also include a second wired interface, which can be configured to communicate with a battery management system host controller.

A new method and circuit arrangement for determining a resistance of a first transistor in a drive system for operating a motor. The drive system comprising a plurality of transistors, and each transistor of the plurality of transistors comprising a control terminal, a first channel terminal, and a second channel terminal. The plurality of transistors is switched to operate the motor using an operating current. A test current is applied between the first and second channel terminals of the first transistor during the on-state of each of the plurality of transistors. The test current is a current value. A voltage difference is measured between the first and second channel terminals of the first transistor during the application of the test current. The on-state resistance of the first transistor is determined based on the current value and the measured voltage difference.

A new method and circuit arrangement for determining a resistance of a first drive transistor in a drive system for operating a motor. The drive system comprising a first drive transistor, a first sense transistor, and a second drive transistor. The first sense transistor is arranged in parallel with the first drive transistor. Each transistor comprising a control terminal, a first channel terminal, and a second channel terminal. The first and second drive transistors are switched to operate the motor using an operating current. The first sense transistor is operated to determine the on-state resistance of the first drive transistor. The operating current flows between motor coils of the motor and the reference node through the first sense transistor.

The present disclosure provides a magnetic multi-turn sensor having a length of magnetoresistive film, wherein the magnetoresistive film comprises a free layer of ferromagnetic material. The free-layer of ferromagnetic material has at least one region of increased thickness, relative to a thickness of the free-layer along the rest of the length of magnetoresistive film. In particular, the free layer is provided with an increased thickness in regions where an increased operating window is required. For example, in closed loop sensors, the points in which two section of magnetoresistive film cross (e.g., to close the loop) may require a higher magnetic operating window to prevent domain wall nucleation in that region.

The present disclosure relates to interleaved analog-to-digital converters (ADCs) that can provide an analog finite impulse response anti-alias filter. The analog finite impulse response anti-alias filter can have an impulse response duration that is longer than an interleaving time conversion window of an individual interleaved ADC of the interleaved ADC.