LG Display Patente

There is provided a TFT backplane having at least one TFT with oxide active layer and at least one TFT with poly-silicon active layer. In the embodiments of the present disclosure, at least one of the TFTs implementing the circuit of pixels in the active area is an oxide TFT (i.e., TFT with oxide semiconductor) while at least one of the TFTs implementing the driving circuit next to the active area is a LTPS TFT (i.e., TFT with poly-Si semiconductor).

A display apparatus presented herein includes a device substrate on which a plurality of pixels are disposed, a first light-emitting device overlapping a first emission area included in a pixel area of each pixel, an upper barrier pattern disposed on the first light-emitting device and comprising an upper opening, and a pixel lens disposed on the upper barrier pattern and overlapping the upper opening of the upper barrier pattern. The first emission area can at least partially overlap the upper opening of the upper barrier pattern. A virtual center line passing through a lens central point of the pixel lens in a direction perpendicular to the device substrate toward the upper barrier pattern can be located outside the first emission area. The quality of an image provided by the display apparatus to a user located obliquely with respect to the display panel is improved.

Disclosed is a display device comprising a plurality of subpixels (SP1, SP2, SP3, SP4), a sensing control line (SCL) extending in a first direction between at least a first pair of subpixels among the plurality of subpixels (SP1, SP2, SP3, SP4) in a plan view of the display device, a reference line (RL) extending in a second direction crossing the first direction between at least a second pair of subpixels among the plurality of subpixels (SP1, SP2, SP3, SP4) in the plan view, and a plurality of sensing thin film transistors (T3, T31, T32, T33, T34) in the plurality of subpixels (SP1, SP2, SP3, SP4) and connected to the sensing control line (SCL) and the reference line (RL), wherein the plurality of sensing thin film transistors (T3, T31, T32, T33, T34) overlap the sensing control line (SCL) and the reference line (RL) in the plan view.

A stretchable display device and a touch display device are provided. The stretchable display device includes a display panel for displaying an image and a touch panel disposed over the display panel. The touch panel includes a first sensing line extending in a first direction and a second sensing line extending in a second direction. The first and second sensing lines have a chain shape in which a plurality of rings are connected to each other, allowing the sensing lines to accommodate deformation while maintaining electrical performance. This structure supports reliable touch detection when the display is stretched, bent, or otherwise deformed, and can be applied to various stretchable display configurations.

A light emitting display apparatus may include a substrate (111) including a plurality of subpixels (SP1, SP2, SP3, SP4) arranged in a first direction, each including an emission area (EA) and a non-emission area (NEA); at least one thin film transistor disposed in the non-emission area on the substrate; at least one protective layer disposed on the at least one thin film transistor; and at least one color filter (CF) disposed on the at least one protective layer, in at least some of the plurality of subpixels. Each of the plurality of subpixels may include a pixel electrode (AE), an emission layer (EL), a common electrode (CE), and a bank portion (BA) defining an opening area of the pixel electrode, and for at least one subpixel among the plurality of subpixels, the bank portion may further include a non-opening bank portion (NBA) extending toward a center portion of the pixel electrode in the first direction or a second direction intersecting the first direction to define a non-opening area of the pixel electrode.

A display apparatus according to the present disclosure comprises a display panel including a plurality of driving electrodes and a plurality of sensing electrodes intersecting the plurality of driving electrodes, and a plurality of touch drivers which is disposed on one side of the display panel and is electrically connected to the plurality of driving electrodes and the plurality of sensing electrodes, wherein the display panel includes a plurality of driving signal lines which connects the plurality of driving electrodes and the plurality of touch drivers, a plurality of sensing signal lines which connects the plurality of sensing electrodes and the plurality of touch drivers, and a plurality of compensation patterns which overlaps the plurality of driving signal lines and extends from the plurality of sensing signal lines.

According to an aspect of the present disclosure, there is provided a display device. The display device includes a substrate comprising a display area and a non-display area and a circuit film electrically connected to at least one side in the non-display area of the substrate. The circuit film includes a plurality of first via holes configured to overlap the non-display area and formed through the circuit film. Some of the plurality of first via holes are included in a first group. Some of the remaining first via holes are included in a second group. The plurality of first via holes included in the first and second groups are arranged in a direction between a first direction and a second direction that is a direction intersecting the first direction. The first and second groups are disposed alternately in the first direction. Therefore, the display device reduce the size of the non-display area.

A light emitting display device including a substrate (110) including a plurality of pixels (P); a planarization layer (PL) on the substrate (110) and having a first portion (PL1) surrounding a plurality of pillar-shaped second portions (PL2); an anode electrode (ANO) on the planarization layer (PL); an emission layer (EL) on the anode electrode (ANO); and a cathode electrode (CAT) on the emission layer (EL). Further, the pillar-shaped second portions (PL2) of the planarization layer (PL) have a refractive index corresponding to a refractive index of the cathode electrode (CAT) such that light transmitted by the emission layer (EL) is reflected within a corresponding pillar towards the substrate (110), and the refractive index of the pillar-shaped second portions (PL2) is greater than a refractive index of the first portion (PL1).

A light emitting display device comprises: a substrate, an insulating layer, a planarization layer, a first anode electrode, a trench, a second anode electrode, an emission layer and a cathode electrode. The substrate has a first pixel and a second pixel. The insulating layer covers the first pixel and the second pixel on the substrate. The planarization layer is disposed on the insulating layer in the first pixel, and has a protrusion extruding upward. The first anode electrode is disposed on an upper surface of the protrusion of the planarization layer in the first pixel. The trench has a slit shape at a circumferential area of the second pixel by removing some portions of the insulating layer. The second anode electrode is disposed on the insulating layer in the second pixel. The emission layer is disposed on the first anode electrode and the second anode electrode. The cathode electrode is disposed on the emission layer.

Disclosed is a display panel (10). The display panel (10) includes a substrate (100), a switching transistor (ST) disposed on the substrate (100) and including a first gate electrode (G1), a first source electrode (SSDla), a first drain electrode (SSD1b), and a first active layer (ACT1), a driving transistor (DT) disposed on the substrate (100) to be spaced apart from the switching transistor (ST) and including a second gate electrode (G2), a second source electrode (DSD1a), a second drain electrode (DSD1b), and a second active layer (ACT2), a light-emitting element (OLED) including an anode (AND) conductively connected to one electrode of the second source electrode (DSDla) and the second drain electrode (DSD1b) of the driving transistor (DT), an emission layer (EL) located on the anode (AND), and a cathode (CTD) located on the emission layer (EL), an intermediate electrode (SD2) configured to conductively connect the one electrode of the second source electrode (DSD1a) and the second drain electrode (DSD1b) of the driving transistor (DT) to the anode (AND), wherein the first active layer (ACT1) of the switching transistor (ST) overlaps at least one of the anode (AND) and the intermediate electrode (SD2), and at least a portion of the second active layer (ACT2) of the driving transistor (DT) does not overlap the anode (AND) and the intermediate electrode (SD2).

A light emitting diode display device (100, 300, 400, 500) includes: a display panel (101); first, second and third pixel regions (P1, P2, P3); a light emitting diode (D) in each of a first emission area (EA1) of the first pixel region (P1), a second emission area (EA2) of the second pixel region (P2) and a third emission area (EA3) of the third pixel region (P3); a transmittance variable layer (120) disposed on the display panel (101) and in each emission area; a touch electrode layer (111) disposed at one side of the transmittance variable layer (120) and including first and second touch electrodes (112, 113), wherein the first touch electrode (112) is disposed in each emission area, and the second touch electrode (113) is disposed in each of a first non-emission area (NEA1) and a second non-emission area (NEA2); and a driving electrode (132) disposed at the other one side of the transmittance variable layer (120) and corresponding to the first touch electrode (112).

A light emitting display apparatus may include a substrate including a display area and a non-display area surrounding the display area, at least one insulating layer on the substrate, a power voltage shorting line on the at least one insulating layer in the non-display area, a plurality of dam patterns in the non-display area, each comprising one or more organic materials and overlapping the power voltage shorting line, and a cover pattern between the plurality of dam patterns and covering an edge portion of the power voltage shorting line.

Discussed is a display device including a planarization layer disposed on a substrate and a plurality of light-emitting elements which is disposed on the planarization layer and includes an anode electrode, an organic layer, and a cathode electrode, the plurality of sub-pixels includes a first sub-pixel and a second sub-pixel spaced apart from the first sub-pixel, the first sub-pixel includes a first light-emitting area emitting light of a first color, the second sub-pixel includes a second light-emitting area emitting light-emitting light of a first color, and a height of the planarization layer in the first light-emitting area is different from a height of the planarization layer in the second light-emitting area, thereby reducing reflectance of external light.

A display device includes a substrate including a plurality of sub-pixels, a first buffer layer disposed on the substrate, a plurality of first signal lines disposed on the first buffer layer, a second buffer layer disposed on the plurality of first signal lines, a first transistor disposed on the second buffer layer and electrically connected to one of the plurality of first signal lines, a third buffer layer disposed on the first transistor, and a second transistor disposed on the third buffer layer.

A light emitting display apparatus according to one or more embodiments of the present disclosure may include a substrate on which a display area and a pad area are disposed, an encapsulation portion extending from the display area toward the pad area on the substrate, at least one inorganic insulating layer disposed on the encapsulation portion, a pad electrode disposed in the pad area on the substrate and electrically connected to respective signal link lines, and a pad cover portion configured to cover at least a portion of the pad electrode in the pad area, the at least one inorganic insulating layer may include an extension pattern portion configured to overlap an end of the pad cover portion.

A probe card and a method for inspecting a light emitting element are disclosed. In one aspect, the probe card includes a probe substrate, a plurality of piezoelectric elements disposed on one surface of the probe substrate, and a plurality of electrode units disposed on the plurality of piezoelectric elements. Each electrode unit includes a plurality of pin electrodes, and each piezoelectric element of the plurality of piezoelectric elements corresponds one to one with each pin electrode of the plurality of pin electrodes. By applying a voltage to each piezoelectric element, its shape can be deformed to change the Z axis position of the corresponding pin electrode. This allows the probe card to adjust the height of individual pin electrodes for contacting electrodes of light emitting elements on a wafer, enabling accurate electrical inspection even when wafer flatness or electrode positions vary.

A display panel according to an example of the present disclosure includes a first data line including a first multiple-wire part and a first single-wire part provided alternately in a first direction, and a second data line including a second multiple-wire part and a second single-wire part provided alternately in the first direction, the first multiple-wire part and the second single-wire part are provided in a second direction intersecting the first direction, and the first single-wire part and the second multiple-wire part are provided in the second direction.

A display device (100) according to embodiments of this specification comprises: a first power line portion(522) extending from a first non-display area (NDA1) to a display area (DA); a second power line portion(521) electrically connected to the first power line portion(522) through a hole in a first insulating layer(331) and extending from the first non-display area (NDA1) to a bending area (BA); and a third power line portion(523) electrically connected to the second power line portion(521) through hole(CH2) in a buffer layer(351) and a second insulating layer(332), thereby preventing the delamination of the insulating layers.

A display device in which each of a plurality of sub-pixels includes a thin film transistor including a semiconductor layer, and an equipotential line is disposed on the same layer as the semiconductor layer and includes the same material as the semiconductor layer.

A light emitting diode display device comprises a substrate including a plurality of emission areas and a non-emission area between the emission areas; a planarization layer corresponding to the emission areas and the non-emission area and disposed on the substrate; a plurality of domes corresponding to the emission areas and disposed on the planarization layer, the plurality of domes spaced apart from each other; a partition wall corresponding to the non-emission area and disposed on the planarization layer, the partition wall spaced apart from the domes; a first electrode covering the planarization layer in the emission area, the domes and at least a portion of the partition wall; and a bank disposed in the non-emission area and covering the bank.

Disclosed is a display device including: a substrate including a display area and a non-display area surrounding the display area; a bendable area disposed in the non-display area; a link area disposed between the display area and the bendable area, wherein an organic insulating structure including an inclined side surface is disposed on the link area; a first signal line disposed on the link area; and a second signal line disposed on the link area, wherein an isolation space is defined between the first signal line and the second signal line of the display device, wherein the isolation space is disposed in a region different from a region where the inclined side surface of the organic insulating structure is disposed.

A light emitting display device according to an embodiment of the present disclosure may comprise a substrate including an active area having a hole and a non-active area surrounding the active area, a plurality of subpixels in the active area, the plurality of subpixels spaced apart from the hole by a first distance, a transistor at each of the plurality of subpixels, a light-emitting element including a first electrode provided at each of the plurality of subpixels and connected to the transistor, a second electrode facing the first electrode, and an intermediate layer interposed between the first electrode and the second electrode and a dam region to surround the hole within the first distance, the dam region including a bank material layer having an undercut.The dam region may comprise at least one light-shielding material among the bank material layer and an upper structure overlapping the bank material layer.

A display device is provided showing, relative to conventional devices, improved performance after thermal degradation. The display device provides a reduced difference between luminance of a degraded device and luminance of a non-degraded device at extreme viewing angles, where this difference cannot be fully addressed by front compensation. Improvement over display devices having subpixels disposed in a regular two dimensional array is accomplished by offsetting a portion of subpixel light-emitting areas along a critical dimension within the plane of a flat screen relative to corresponding subpixel lenses, a design that compensates for shrinkage in subpixel light-emitting areas in degraded displays.

A display device can include a display panel (150) including subpixels having light-emitting elements, a data driver (140) configured to supply a data voltage (Vdata) or a park voltage (Vark) to the subpixels through a data line, and a timing controller (120) configured to control the data driver and provide a park voltage control value (TVPark) to the data driver. The data driver generates the park voltage based on the park voltage control value.

A display device (100) presented herein includes a substrate (110) including a display area (A/A) and a non-display area (N/A) surrounding the display area (A/A), a plurality of pixels (PX) disposed in the display area (A/A) and including a light emitting element (130) and a driving transistor (120), at least one dam (DAM1, DAM2, DAM3) disposed in the non-display area (N/A), an organic optical layer (141, 241) covering the plurality of pixels (PX), and at least one blocking pattern (CP1, CP2) disposed in the non-display area (N/A) and penetrating the organic optical layer (141, 241).

A display device in some examples includes a first area, a second area, gate lines arranged in a first direction in the first and second areas, first data lines arranged in a second direction perpendicular to the first direction in the first area, second data lines arranged in the second direction in the second area and having a length shorter than a length of the first data lines, vertical link lines arranged in the second direction in the first area, and horizontal link lines arranged in the first direction in the first and second areas. Each of the vertical link lines is electrically connected to the corresponding one second data line through the corresponding one horizontal link line, and each of the vertical link lines has a length inversely proportional to a length of the second data lines to be connected.

Disclosed are a display device and a display panel (100). The display device may include a display panel (100) and a plurality of circuit boards (200) connected to the display panel (100). The display panel (100) may include an electrode pattern (110) disposed on a substrate (10) and a pad (120) electrically connected to the circuit boards (200). The pad (120) may include a first pad (120a) arranged on the electrode pattern (110) to overlap the electrode pattern (110). The first pad (120a) may include a plurality of first pad wires (121) spaced apart from one another. This structure may allow for improved electrical connection and heat dissipation in regions where wire concentration is high.

A thin transistor and a display apparatus comprising the same are disclosed. Disclosed is a thin film transistor comprising an active layer including a channel portion, a gate insulating layer on the active layer, and a gate electrode on the gate insulating layer, wherein the gate electrode includes a first gate electrode, and a second gate electrode, wherein each of the first gate electrode and the second gate electrode is spaced apart from the active layer and is disposed to face the active layer, the first gate electrode is in contact with the second gate electrode, and the first gate electrode has a work function different from a work function of the second gate electrode.

A display panel includes a circuit film disposed on one side of a substrate, a plurality of first link parts connected to the circuit film, a first bar having first bridges respectively connected to the plurality of first link parts. The first bar has a plane extending in a length direction and a width direction. Each first bridge has a width in the length direction, and the first bridges located at on opposite sides of the first bar in the length direction have a width greater than that of the first bridge located at a center of the first bar in the length direction. This configuration facilitates distribution of current supplied through the first link parts and supports stable electrical connection between the circuit film and the first bar.

A light emitting display device includes a substrate (100), a plurality of pixels, a first planarization layer (PL1), a second planarization layer 8PL2), an anode electrode (ANO), an emission layer (EL) and a cathode electrode (CAT). The plurality of pixels is arranged on the substrate (110). Each pixel has an emission area (EA) and a non-emission area (NEA). The first planarization layer (PL1) is disposed at the non-emission area (NEA) with a first refractive index on the substrate (110). The second planarization layer (PL2) is disposed at the emission area (EA) with a second refractive index higher than the first refractive index. The second planarization layer (PL2) is extruded upward from the first planarization layer (PL1). The anode electrode (ANO) is disposed on the second planarization layer (PL2) within the emission area (EA). The emission layer (EL) is disposed on the anode electrode (ANO) , the first planarization layer (PL1) and the second planarization layer (PL2). The cathode electrode (CAT) is disposed on the emission layer (EL).

A display device (100, 200, 300, 400) includes a display panel (101) including a light emitting diode (D) in each of first to third emission areas (EA1, EA2, EA3) of first to third pixel regions (P1, P2, P3); a transmittance variable layer (175, 275) on the display panel (101) and including first to third spacers (180a, 180b, 180c; 280a, 280b, 280c; 380a, 380b, 380c) and a light absorbing layer (178, 278) in a space between the first to third spacers (180a, 180b, 180c; 280a, 280b, 280c; 380a, 380b, 380c) or at a side surface of each spaces, the first to third spacers (180a, 180b, 180c; 280a, 280b, 280c; 380a, 380b, 380c) respectively in the first to third emission areas (EA1, EA2, EA3); a driving electrode layer (171, 271, 471) at one side of the transmittance variable layer (175, 275) and including first and second driving electrodes (172, 272, 472; 173, 273, 473) respectively in first and second non-emission areas (NEA1, NEA2); and a touch electrode layer (181, 281, 481) at the other side of the transmittance variable layer (175, 275) and including first and second touch electrodes (182, 282, 482; 183, 283, 483) respectively corresponding to the first and second driving electrodes (172, 272, 472; 173, 273, 473). This configuration enables control of light transmittance to reduce ambient light reflection while maintaining display brightness and integrating touch sensing functionality.

A self-assembly substrate and a display device including a self-assembly line. The self-assembly substrate includes a first assembly line (134) and a second assembly line (136) spaced apart from each other in a first direction (X) and extending in a second direction; an insulation layer (117) on the first and second assembly lines (134, 136), the insulation layer (117) having an assembly hole (117h) between the first and second assembly lines (134, 136); a first assembly electrode (135) between the first assembly line (134) and the assembly hole (117h); and a second assembly electrode (137) between the second assembly line (136) and the assembly hole (117h), wherein the first and second assembly electrodes (135, 137) respectively include a first side (S1) exposed by the assembly hole (117h) and a second side (S2) connected to the first and second assembly lines (134, 136), and wherein each end of the first side (S1) is located within the assembly hole (117h) and spaced apart from an edge of the assembly hole (117h).

A display apparatus includes a backlight unit including a first light guide plate and a first light source element, a liquid crystal display panel located on an upper surface of the first light guide plate and including a sensing area, and an optical module located on a lower surface of the first light guide plate and including a reflective structure having an inclined surface. The display apparatus further includes a second light source element, a optical sheet, and an optical element, wherein the inclined surface of the reflective structure overlaps the sensing area of the liquid crystal display panel, and the second light source element and the optical element are located on different surfaces of the reflective structure to minimize a luminance deviation between the active area and the sensing area of the display apparatus.

A light emitting display apparatus according to an embodiment of the present disclosure may comprise a substrate comprising a display area and a pad area, a pixel circuit layer including a pixel circuit configured in the display area, an overcoat layer configured in the display area to cover the pixel circuit layer, a light emitting device layer configured on the overcoat layer and electrically connected to the pixel circuit, an encapsulation part configured on the overcoat layer to cover the light emitting device layer, and a pad part configured in the pad area and electrically connected to the pixel circuit. The overcoat layer may include an extension portion extending to a routing area between the display area and the pad area, and at least a portion of the extension portion of the overcoat layer may have a same thickness as a central portion of the overcoat layer.

A display apparatus includes a substrate having a display area with a hole part, a hole bezel area adjacent to the hole part, and a non-display area adjacent to the display area. A buffer layer is disposed on the substrate, and a pixel circuit layer including a pixel circuit and a pixel insulating layer is formed on the buffer layer in the display area. An overcoat layer covers the pixel circuit layer, and a light emitting device layer including a light emitting device is disposed on the overcoat layer. A crack stopper is disposed in the hole bezel area to surround the hole part and is configured to form a vertical wall between the substrate and the overcoat layer, thereby preventing crack propagation toward the display area and improving structural stability and display reliability.

Disclosures disclose a display device including: a substrate; a plurality of pixels disposed on the substrate; a plurality of touch electrodes disposed on the encapsulation portion; and a black matrix disposed on the plurality of touch electrodes, wherein the plurality of touch electrodes include a plurality of first opening holes that expose each of the plurality of pixels and a second opening hole larger than the plurality of first opening holes..

A display device (100) according to embodiments of the present disclosure may include a substrate (111) including a display area (DA) and a non-display area (NDA) outside the display area (DA), the display area (DA) including an upper display area (DA_TOP), a lower display area (DA_BOT), and a middle display area (DA_MID) between the upper display area (DA_TOP) and the lower display area (DA_BOT), and the non-display area (NDA) including a pad area (PA) closer to the upper display area (DA_TOP) than the middle display area (DA_MID), and a plurality of data lines (DL) arranged in the display area (DA). An n-th data line (DL(n)) among the plurality of data lines (DL) may include an n-th upper data line (DL(n)_TOP) arranged in the upper display area (DA_TOP) and extending in a first direction, an n-th lower data line (DL(n)_BOT) arranged in the lower display area (DA_BOT) and extending in the first direction, and an n-th bypass link line (DL(n)_BLL) passing through the middle display area (DA_MID) and electrically connecting the n-th upper data line (DL(n)_TOP) and the n-th lower data line (DL(n)_BOT), wherein n is a natural number greater than or equal to 1.

A display device (100) can include a substrate (110) in which a plurality of sub pixels (SP1, SP2, SP3) is defined, a thin film transistor (120) disposed on the substrate (110), a planarization layer (PNL) disposed on the thin film transistor (120), an organic light emitting diode (130) disposed on the planarization layer (PNL) to correspond to each of the plurality of sub pixels (SP1, SP2, SP3), an encapsulation layer (140) disposed on the organic light emitting diode (130), a touch sensor layer (150), a touch protection layer (TPAS) disposed on the touch sensor layer (150), a black matrix (160) disposed between adjacent sub pixels on the touch protection layer (TPAS), and a plurality of color filters disposed on the touch protection layer (TPAS) to correspond to each of the plurality of sub pixels (SP1, SP2, SP3).

A display device according to embodiments of the present disclosure may include a substrate including a display area capable of displaying an image and a non-display area outside the display area, and N data lines arranged on the substrate. The substrate may include first to fifth areas sequentially located in a first direction. The display area may include first to fifth display areas included in the first to fifth areas, respectively. The third area may includes a third display area, a first non-display area on one side of the third display area, and a second non-display area on the other side of the third display area. The N data lines may include M1 data lines passing through the first non-display area within the third area, M2 data lines passing through the second non-display area within the third area, and M3 data lines passing through the third display area within the third area. Here, the N is a natural number greater than or equal to 3, and each of the M1, the M2 and the M3 is a natural number greater than or equal to 1, and the sum of the M1, the M2 and the M3 may correspond to the N.

A display apparatus includes: a substrate (100) with a pixel area (PA), the pixel area including a light-emitting device (300); an encapsulation unit (400) on the light-emitting device (300); an insulating layer (530, 750) on the encapsulation unit (400), an upper surface of the insulating layer (530,750) including a groove (750g) that is a recessed portion toward the substrate (100), the groove (750g) overlapping with the light-emitting device (300); an optical lens (610) disposed on the insulation layer (530, 750), the optical lens (610) covering the groove (750g); and a plurality of touch electrodes (711, 721) on the insulating layer (530, 750), the plurality of touch electrodes (711, 721) including an opening that corresponds to the light-emitting device (300).