AT & S Austria Technologie & Systemtechnik

There is described a component carrier (100), comprising: i) a stack (101), comprising a plurality of electrically conductive layer structures (104) and at least one electrically insulating layer structure (102); ii) at least one embedded electrically conductive layer structure (110), embedded in the at least one electrically insulating layer structure (102), and exposed at one main surface (103) of the at least one electrically insulating layer structure (102), wherein the at least one embedded electrically conductive layer structure (110) comprises a first amount of stacked electrically conductive layer structures; and iii) at least one surface electrically conductive layer structure (120), provided on the main surface (103) of the at least one electrically insulating layer structure (102), wherein the at least one surface electrically conductive layer structure (120) comprises a second amount of stacked electrically conductive layer structures.

The present invention relates to a component carrier (100) a method for manufacturing thereof, wherein the component carrier (100) comprises a stack (110) comprising at least one electrically conductive layer structure (104) and a plurality electrically insulating layer structures (102), said stack (110) comprising a cavity (130). A component (140) is embedded in the cavity (130) and at least one further layer portion (120) is partially filling the cavity (130). The space between the cavity (130) and component (140) and/or the at least one further layer portion (120) is filled by resin (150) flowed from one of the plurality of electrically insulating layer structures and/or from the at least one further layer portion.

There is described a component carrier (100) having a stack (101), wherein the stack (101) comprises:i) at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102, 140);ii) an inorganic layer structure (110) with a, in particular planar, main surface (111);iii) a cavity (120) in the stack (101), defined by a bottom (121) and a sidewall (122); andiv) at least one stop layer (130), arranged at least partially in or on the main surface (111) of the inorganic layer structure (110) and exposed at the bottom (121) of the cavity (120). The present application further provides a method of manufacturing a component carrier (100).

There is described a component carrier (100) having a stack (101), wherein the stack (101) comprises: i) at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102); and ii) a cavity (105) provided in the stack (101), wherein the cavity (105) comprises: a) a first cavity portion (110) provided on a first vertical level (hl) of the stack (101), wherein the first cavity portion (110) partially vertically extends along the thickness of a first electrically insulating layer structure (112) of the at least one electrically insulating layer structure (102), and b) a second cavity portion (120) provided on a second vertical level (h2) of the stack (101), wherein the first cavity portion (110) and the second cavity portion (120) are connected to each other through their vertical thickness extension (z) in the stack (101).

The present invention relates to a component carrier (100) a method for manufacturing thereof, wherein the component carrier (100) comprises a stack (110) comprising a plurality of electrically conductive layer structures (104) and a plurality of electrically insulating layer structures (102). Said stack (110) further comprises a cavity (120) having a bottom wall (122) composed of a plurality of portions (124) having a respective vertical level, and being delimited by one main surface of one of said plurality of electrically conductive layer structures (104) or electrically insulating layer structures (102) composing the stack (110). Additionally, the component carrier (100) comprises a plurality of components (130) provided in said cavity (120), at least two of said components (130) having different heights one to each other and each of said components (130) being associated to one respective portion (124), such that the surfaces of said components (130) opposed to the bottom wall (122) of the cavity (120) are vertically positioned within the vertical extension of the same external layer structures Further additionally, the component carrier (100) comprises an encapsulant material (140) embedding said plurality of components (130).

A component carrier (100), which comprises a stack (102) which comprises at least one electrically conductive layer structure (104-106) and at least one electrically insulating layer structure (108), at least two components (110, 112) arranged on and/or in the stack (102) side-by-side and divided by a space (114), and at least one electrically conductive first vertical partitioning structure (116) and at least one electrically conductive second vertical partitioning structure (118), wherein at least one of the vertical partitioning structures (116, 118) is arranged at least partially in said space (114) and wherein each of the vertical partitioning structures (116, 118), in a plan view on the stack (102), surrounds at least partially at least one assigned one of the at least two components (110, 112), wherein said at least one first vertical partitioning structure (116) and said at least one second vertical partitioning structure (118) interact with one of said at least one electrically conductive layer structure (104) for shielding the at least two components (110, 112) and are disconnected from each other in a shielding region (120) around said at least two components (110, 112).

There is described an apparatus (100) for treating a portion of a surface of at least one electrically conductive layer structure (210) of a layer stack (201) of a printed circuit board or the like (200), wherein the apparatus (100) comprises a surface treatment unit (120), configured to alter along a predefined multi-profiled shape (250) a portion of the exposed surface of the at least one electrically conductive layer structure (210). Further, there is described a PCB or the like (200) and a method for treating a surface.

An electronic board (100) which comprises a stack (102) comprising at least one electrically insulating layer structure (104) and a plurality of electrically conductive layer structures (106, 108), wherein one of said plurality of electrically conductive layer structures (106) is provided on one main surface (110) of said at least one electrically insulating layer structure (104) and a further one of said plurality of electrically conductive layer structures (108) is provided on an opposing further main surface (112) of said at least one electrically insulating layer structure (104), a through hole (120) formed in the stack (102) and being laterally delimited by conductive material, at least one plating layer (122) provided on at least part of both opposing main surfaces (114, 116) of the stack (102) and on a lateral wall (118) of the stack (102), an axial annular protrusion (126, 128) provided at one extremity of the through hole (120), and a radial annular protrusion (130, 132, 134) provided at the lateral wall (118) of the stack (102).

A component carrier (100) which comprises a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106), wherein the at least one electrically insulating layer structure (106) has a first main surface (108) and an opposing second main surface (110), and at least one cavity (116) formed in the first main surface (108) of the at least one electrically insulating layer structure (106) and being delimited by a bottom wall (112) and a sidewall (114), wherein a surface of said bottom wall (112) and a surface of said sidewall (114) of the at least one cavity (116) have a different roughness Ra than said first main surface (108) and/or than said second main surface (110) of the at least one electrically insulating layer structure (106).

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