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A wireless device may include a transmitter and one or more processors. The processors may be configured to receive a plurality of spatial streams of encoded data corresponding to a number of spatial streams. The processors may be configured to modulate encoded bits of the encoded data to a set of modulated symbols using a number of bits per subcarrier stream (NBPSCS). The processors may be configured to determine a tone-mapping distance based at least on the number of spatial streams and the NBPSCS. The processors may be configured to map the set of modulated symbols onto a set of frequency subcarriers using the determined tone-mapping distance. The transmitter may be configured to transmit the encoded data to another wireless device using the set of frequency subcarriers.

The subject technology is directed to semiconductor devices and fabrication methods thereof. In an embodiment, the subject technology provides an apparatus that includes a substrate comprising a first metal material and a first layer coupled to the substrate. The apparatus further includes a second layer coupled to the substrate via the first layer. The second layer comprises an organic material. The first layer includes a third layer comprising a first adhesion material configured to couple to the organic material, a fourth layer comprising a second adhesion material, and a fifth layer comprising a third adhesion material configured to couple to the first metal material. The multi-layer adhesion system enables reliable bonding between organic and metallic components, ensuring robust mechanical and electrical performance of the system. There are other embodiments as well.

Cooling assemblies that can be used with various types of integrated circuits to provide improved efficiency. An example integrated circuit includes a circuit die, a stiffener ring, a heat exchange structure, and a cover plate disposed on the heat exchange structure; and a clamp secured to the cover plate. The integrated circuit can also include a seal disposed between the cover plate and the heat exchange structure, where the seal prevents leakage of fluid that circulates through the heat exchange structure.

An apparatus including first and second samplers, first and second analog-to-digital converters, and a clock generator. The first sampler produces a first stream of sampled values in response to sampling an analog input signal on a first input channel. The first analog-to-digital converter generates a first stream of digital data. The second sampler produces a second stream of sampled values in response to sampling an analog input signal on a second input channel. The second analog-to-digital converter converts the second stream of sampled values into a second stream of digital data. The clock generator causes the first analog-to-digital converter to convert the first stream of sampled values into the first stream of digital data in response to a mode instruction designating a custom operating mode. The clock generator also causes the first analog-to-digital converter to convert the second stream of sampled values into the first stream of digital data in response to the mode instruction designating a standard operating mode.

A computer is configured to set up a remote direct memory access (RDMA) connection for an application, by performing the steps of: receiving, from the application, by an RDMA driver, a sequence of API requests for setting up the RDMA connection, the API requests including information for setting up the RDMA connection; transmitting, by the RDMA driver to a NIC of the computer, in response to a last API request in the sequence, a first hardware request for setting up the RDMA connection; and generating, by the NIC in response to the first hardware request, a queue pair based on the information for setting up the RDMA connection, and also configuring, by the NIC, the queue pair based on the information for setting up the RDMA connection, the queue pair including memory space for storing receive and send requests of the application.

Equal probability dynamic element matching functionality for use in various types of integrated circuits (e.g., communications circuits, etc.). The equal probability dynamic element matching functionality generally includes arranging circuit elements in a loop, and using both a pointer and a random number having a binary value to provide equal selection of circuit elements in the loop over time. The equal probability dynamic element matching functionality can be used to improve performance and durability of various types of integrated circuits.

An apparatus including a comparator and a plurality of replica current sources. The comparator outputs a control voltage onto an output line upon comparing a midpoint voltage with a feedback voltage. The control voltage indicates whether the feedback voltage is higher or lower than the midpoint voltage. Each of the replica current sources draws a supply voltage from a supply line. A replica current source enters into an inactive state in response to an enable signal being in a deactivating state. Upon entering the inactive state, the replica current source ceases drawing the control voltage from the output line.

The disclosure describes systems and methods for implementing network slicing in optical access networks. The system can identify a plurality of allocation identifiers corresponding to a plurality of optical network units in a passive optical network. Each of the plurality of allocation identifiers can have one or more properties. The system can establish one or more slices, where each of the one or more slices can include a set of allocation identifiers of one or more flows having a common property of the one or more properties. The system can allocate a portion of bandwidth to each of the one or more slices. The system can associate the one or more slices with one or more virtual network operators.

A circuit including a first resistor (R21), a second resistor (R22), a current source (211) and a transistor (QP23). The first resistor (R21) is between a voltage rail and a drive interconnect. The drive interconnect and the voltage rail are electrically connected to the first resistor (R21). The second resistor (R22) is between the drive interconnect and ground. Ground and the drive interconnect are electrically connected to the second resistor (R22). The current source (211) is between the voltage rail and the drive interconnect. The drive interconnect and the voltage rail are electrically connected to the current source (211). The transistor (QP23) is between the drive interconnect and a sink interconnect. The drive interconnect and the sink interconnect are electrically connected to the transistor (QP23).

Compact mechanisms for attaching co-packaged devices to integrated circuit (IC) packages. An example integrated circuit includes a substrate having an outer periphery; a circuit die disposed on the substrate and contained within the outer periphery; a stiffener structure that is disposed on the substrate, contained within the outer periphery, and including a threaded opening; a compression structure secured to the stiffener structure via the threaded opening; and a co-packaged device (CPD) disposed on the substrate such that a first surface portion of the CPD contacts the compression structure and such that a second surface portion of the CPD contacts the substrate.