Murata Manufacturing
🇯🇵 Japan aktiv
Japanisches Elektronikunternehmen mit Sitz in Kyoto. Murata entwickelt und produziert elektronische Bauelemente wie Kondensatoren, Sensoren und Kommunikationsmodule für Elektronikgeräte.
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Patente
13.736 gesamt| Patent | |||
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21.10.2026
Elektronisches Bauelement und Verfahren zu dessen Herstellung
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Zusammenfassung
The invention discloses a microelectromechanical component and a method for manufacturing thereof. The component comprises a capping layer and a device layer which are bonded together. The capping layer comprises an insulating part. The insulating part comprises at least one silicon dioxide layer. The silicon dioxide layer is partly fabricated by thermal oxidation of the silicon semiconductor capping wafer. |
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30.09.2026
Keramischer Mehrschichtkondensator
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Status
Angemeldet am 25.03.2026
Anhängig
Vertretung
Zusammenfassung
A multilayer body 10 includes a first inner electrode 30A having one end exposed onto a third surface F3, a second inner electrode 30B having one end exposed onto a fourth surface F4, and a dielectric layer 20 containing at least one element out of Ca and Sr. On a cross-section which is parallel to a lamination direction T and to a second direction W, and on which an end portion in the second direction W of an end portion on the third surface F3 side of the second inner electrode 30B is located closer to a fifth surface F5 side than the first inner electrode 30A, a total content of Ca and Sr in a region R15 where a distance from an end portion on the fifth surface F5 side in the second direction W of the first inner electrode 30A is equal to or below 5 µm is larger than a total content of Ca and Sr in a region R2C where a distance from a center in the second direction W of the first inner electrode 30A is equal to or below 5 µm. |
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30.09.2026
Keramischer Mehrschichtkondensator
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Status
Angemeldet am 25.03.2026
Anhängig
Vertretung
Zusammenfassung
A first inner electrode 30A includes a 1-1 region 31A, and a 1-2 region 32A having a shorter dimension in a second direction W than the 1-1 region 31A and located closer to a third surface F3 side than the 1-1 region 31A. An end portion on the third surface F3 side of a second inner electrode 30B intersects with an end portion in the second direction W of the 1-2 region 32A when viewed in a lamination direction T. At least one of the following conditions is satisfied: a concentration of Sn in the end portion in the second direction W of the 1-2 region 32A is higher than a concentration of Sn in an end portion in the second direction W of the 1-1 region 31A; a concentration of In in the end portion in the second direction W of the 1-2 region 32A is higher than a concentration of In in the end portion in the second direction W of the 1-1 region 31A; and a concentration of Au in the end portion in the second direction W of the 1-2 region 32A is higher than a concentration of Au in the end portion in the second direction W of the 1-1 region 31A. |
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23.09.2026
Ein Mehrschichtiger Keramikkondensator, dessen Basis Breiter Ist als Seine Oberseite
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Status
Angemeldet am 16.03.2026
Anhängig
Vertretung
Zusammenfassung
A multilayer ceramic capacitor (1) includes a multilayer body (10) having a first surface P1 and a second surface P2 that face oppositely in a lamination direction T and a fifth surface P5 and a sixth surface P6 that face oppositely in a second direction D2 orthogonally intersecting the lamination direction T. The multilayer ceramic capacitor (1) also includes a pair of outer electrodes (40) connected to first inner electrodes (31) and to second inner electrodes (32), respectively. The size of the multilayer body (10) in the lamination direction T is greater than the size thereof in the second direction D2. The multilayer body (10) includes inner electrodes (30) arranged in the lamination direction T, and an amount of deviation of an end of each inner electrode 30 in the second direction D2 is 0.5 µm or less. When the multilayer body (10) is divided into a region R1 closer to the first surface P1 and a region R2 closer to the second surface P2, the concentration of an additive being present between the fifth surface P5 and the first inner electrodes (31) is higher in the region R2 than in the region R1. |
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23.09.2026
Ein Mehrschichtiger Keramikkondensator, dessen Basis Breiter Ist als Seine Oberseite
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Status
Angemeldet am 16.03.2026
Anhängig
Vertretung
Zusammenfassung
A multilayer ceramic capacitor (1) includes a multilayer body (10) having a first surface P1 and a second surface P2 that face oppositely in a lamination direction T and a fifth surface P5 and a sixth surface P6 that face oppositely in a second direction D2 orthogonally intersecting the lamination direction T. The multilayer ceramic capacitor (1) also includes a pair of outer electrodes (40) connected to first inner electrodes (31) and to second inner electrodes (32), respectively. The size of the multilayer body (10) in the lamination direction T is greater than the size thereof in the second direction D2. Inner electrodes (30) are arranged in the lamination direction T, and an amount of deviation of an end of each inner electrode (30) in the second direction D2 is 0.5 µm or less. When the multilayer body (10) is divided into a region R1 closer to the first surface P1 and a region R2 closer to the second surface P2, a maximum distance between the fifth surface P5 and the first inner electrodes (31) in the second direction D2 is greater in the region R2 than in the region R1. |
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19.08.2026
Asic-Verkappte Doppelschicht-Mems-Plattform
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Zusammenfassung
The disclosure relates to a microelectromechanical (MEMS) device and to a method of manufacturing a MEMS device. The MEMS device comprises a a cap layer, two MEMS device layers and an ASIC layer, while the cap layer and the ASIC layer enclose functional elements of the two MEMS device layers in an enclosure. Digital signals, ground and operating voltage of ASIC circuitry are coupled with outside of the MEMS device through one or more ASIC signal through-silicon-vias traveling through the two MEMS device layers and the cap layer. |
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19.08.2026
Mit Asic Verkappte Mems-Vorrichtung
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Zusammenfassung
The disclosure relates to microelectromechanical (MEMS) devices. The MEMS device comprises an ASIC layer, a MEMS device layer and a cap layer and bonding layers therebetween form an enclosure for movable MEMS elements. The MEMS device layer and the cap layer comprise at least one ASIC signal through-silicon-via that electrically connects signals of an ASIC active circuitry the respective metal pad on the outer face of the cap layer. |
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19.08.2026
Mikroelektromechanisches system
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Zusammenfassung
The disclosure relates to microelectromechanical system comprising an ASIC layer, a handle layer, a device layer and a cap layer vertically attached to each other in a given order. The device layer is electrically connected to the ASIC layer through the handle layer. |
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19.08.2026
Mikroelektromechanisches system
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Zusammenfassung
The disclosure relates to a microelectromechanical system comprising an ASIC layer, an interposer layer, a MEMS layer with movable structures and a cap layer stacked with each other in a listed order. The interposer layer and the cap layer form one isolated enclosure, and the ASIC layer and the cap layer form another isolated enclosure, wherein pressures in the isolated enclosures are different. An advantage of the arrangement of the disclosure is that it allows to set different pressures in the isolated enclosures reliably without extra process steps. |
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19.08.2026
Mikroelektromechanische Vorrichtung und Verfahren
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Zusammenfassung
A microelectromechanical device comprises a MEMS device layer a handle layer and a cap layer. The device also comprises an interposer layer between the handle layer and the MEMS device layer. The interposer layer comprises an insulating layer on the surface of the handle layer and a polysilicon layer on the insulating layer. The device layer comprises a mobile mass element. The polysilicon layer lies beneath the mass element and is electrically connected to a first external contact in the cap layer through the device layer. |
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