Murata Manufacturing Patente

The disclosure relates to a microelectromechanical system comprising an ASIC layer, an interposer layer, a MEMS layer with movable structures and a cap layer stacked with each other in a listed order. The interposer layer and the cap layer form one isolated enclosure, and the ASIC layer and the cap layer form another isolated enclosure, wherein pressures in the isolated enclosures are different. An advantage of the arrangement of the disclosure is that it allows to set different pressures in the isolated enclosures reliably without extra process steps.

The disclosure relates to microelectromechanical (MEMS) devices. The MEMS device comprises an ASIC layer, a MEMS device layer and a cap layer and bonding layers therebetween form an enclosure for movable MEMS elements. The MEMS device layer and the cap layer comprise at least one ASIC signal through-silicon-via that electrically connects signals of an ASIC active circuitry the respective metal pad on the outer face of the cap layer.

The disclosure relates to microelectromechanical system comprising an ASIC layer, a handle layer, a device layer and a cap layer vertically attached to each other in a given order. The device layer is electrically connected to the ASIC layer through the handle layer.

A microelectromechanical device comprises a MEMS device layer a handle layer and a cap layer. The device also comprises an interposer layer between the handle layer and the MEMS device layer. The interposer layer comprises an insulating layer on the surface of the handle layer and a polysilicon layer on the insulating layer. The device layer comprises a mobile mass element. The polysilicon layer lies beneath the mass element and is electrically connected to a first external contact in the cap layer through the device layer.

The disclosure relates to a microelectromechanical (MEMS) device and to a method of manufacturing a MEMS device. The MEMS device comprises a a cap layer, two MEMS device layers and an ASIC layer, while the cap layer and the ASIC layer enclose functional elements of the two MEMS device layers in an enclosure. Digital signals, ground and operating voltage of ASIC circuitry are coupled with outside of the MEMS device through one or more ASIC signal through-silicon-vias traveling through the two MEMS device layers and the cap layer.

The disclosure relates to a aspects of a method for manufacturing electronic and/or microelectromechanical system, MEMS, devices using a lid frame that carries a plurality of such devices. Use of the lid frame enables performing manufacturing steps as well as testing and/or calibration of devices packaged into individually produced housings with manufacturing, testing and calibration equipment that is designed to handle lead frames.

An electrical device comprising,- a substrate region (100),- a first electrode formed in a first doped diamond layer (101), on the substrate region (100),- a dielectric layer (102, 105, 106, 108, 110, 104, 107) on the first doped diamond layer (101) comprising two adjacent regions, a first region called intermediate layer (102, 105, 106, 108, 110) formed in a dielectric diamond material layer and a second region (104, 107) formed in a dielectric material,- a second electrode formed in a conductor material layer (103, 113, 123, 133), located on the dielectric layer,wherein- said first region in the dielectric diamond material having a first constant thickness- the second region comprises a dielectric material and has an increasing thickness from said first constant thickness on the intermediate layer (102, 105, 106, 108, 110) side to a second thickness on its other side opposite to the intermediate layer, said increase of thickness having a curved shape,- the second electrode (103, 113, 123, 133) comprises a first region (103a) having a first constant thickness above the intermediate layer (102, 105, 106, 108, 110) and a termination region (103b, 113b) extending the first region in a curved shape above the dielectric material.

The invention concerns a wafer comprising: - a metal layer deposited on a substrate, said metal layer comprising at least: • a first region made of said metal; and • a porous region comprising a plurality of substantially straight pores that extend from a top surface of the first porous region towards the substrate, the porous region being thicker than the first region; - at least one integrated device formed inside the pores of the porous region; the wafer further comprising: - a test arrangement comprising: • an insulating layer deposited on both the first region and the porous region, • a first contact pad and a second contact pad deposited on the insulating layer above the porous region; and a third contact pad deposited on the insulating layer above the first region.

The disclosure describes an arrangement comprising a spring-supported tiltable hermetic housing structure with an optical window and single-axis scanning mirror inside the housing structure. The arrangement enables the use of the resonance scanning mode of the mirror in vacuum, inside the housing structure, as well as the quasistatic scanning mode of the mirror by oscillating the housing structure in ambient pressure.

The present invention relates to an electrical device (100) comprising a capacitor for high-voltage applications and method for manufacturing thereof. In particular, the proposed electrical device (100) includes a capacitor comprising:- a bottom electrode (110) comprising a semiconductor substrate (111),- a dielectric (120) extending conformally on the bottom electrode (110),- a top electrode (130) on the dielectric (120),wherein the substrate (111) comprises:- a first region of a first doping type (113) extending from a bottom surface of the substrate (111-BS) up to a top surface of the substrate (111-TS),- second regions of a second doping type (114) having opposite charge carriers in comparison with the first doping type and extending from the top surface of the substrate (111-TS) down to a given depth (111-D).

An integrated electrical device comprising an energy storage component, comprising:a support comprising a porous region (103) including a plurality of substantially straight pores (POR) that extend from a top surface of the porous region towards the bottom of the porous region,an insulating layer (104) having an opening (OP) delimiting a portion of the porous region,a bottom electrode layer (105),an intermediate region (106, 1061, 106T, 106T) comprising a dielectric or an ionic conductor, the intermediate region having an inner portion (1061) arranged on an inner portion of the bottom electrode layer and a top portion (106T, 106T') arranged on a top portion of the bottom electrode layer, the inner portion of the intermediate region having a first thickness (T1) and the top portion of the intermediate region having a second thickness (T2) greater than the first thickness,a top electrode layer (107) arranged on the intermediate region.

A substrate assembly includes a first substrate, a second substrate, a retainer attached to the second substrate, and a housing connected to the first substrate. The retainer is mounted to the housing, and the first substrate and the second substrate are electrically connected. The retainer includes an adjustable arm that is configured to vary in length, and a clamp that engages the second substrate.

The disclosure relates to a MEMS device with in-plane moving structures and translation beams to move a rotating structure out-of-plane, wherein the arrangement of the translation beams contributes to the out-of-plane rotation of the rotating structure. An advantage of the arrangement of the disclosure is that out-of-plane movement to the large tilt angles is achieved with lower voltage in comparison to two-layer tilting structures.

An accelerometer which comprises a first, second, third and fourth measurement cell. Each of the first, second, third and fourth measurement cells comprises a mass element which is mobile in the y-direction and first and second fixed structures. The mass element forms a differential capacitor with the first and second fixed structures. Each of the first, second, third and fourth measurement cells comprises a central line, and the first and second fixed structures are on opposite sides of the central line in each of the first, second, third and fourth measurement cells. The placement of the first and second capacitors with respect to the central line in the first and third measurement cells is the same. The placement of the first and second capacitors with respect to the central line in the second and fourth measurement cells is the same. The placement of the first and second capacitors with respect to the central line in the first measurement cell is opposite to the placement of the first and second capacitors with respect to the central line in the second measurement cell.

The present invention relates to an electrical device comprising a capacitor including: a bottom electrode structure (110) comprising a silicon substrate (112), a dielectric stack (120) extending on the bottom electrode structure (110), the dielectric stack (120) comprising at least: a thermal silicon dioxide layer (121) on the silicon substrate having a thickness comprised between 10% and 20% of the thickness of the dielectric stack, a SixNy layer (122) on the thermal silicon dioxide layer having a thickness comprised between 45% and 55% of the thickness of the dielectric stack, and a deposited silicon dioxide layer (123)) on the SixNy layer having a thickness comprised between 35% and 45% of the thickness of the dielectric stack, a top electrode structure (130) extending on the dielectric stack (120).

A Lissajous frequency-modulated microelectromechanical gyroscope where a control unit is configured transmit drive signals to one or more drive transducers to drive one or more mass elements in a first and a second oscillation mode. The control unit is configured to continuously transmit a first crosstalk compensation signal to the one or more mass elements and to set the amplitude of the first crosstalk compensation signal to a value which is proportional to an amplitude difference in a frequency spectrum obtained from a sense signal retrieved from the one or more mass elements.

The disclosure relates to a circuitry and a method for extracting a digitized DC voltage value representing a magnitude of a discrete-time signal received from a discrete-time system. A first full-wave rectifier performs a full-wave rectification of the discrete-time signal to obtain a full-wave rectified signal, and an oversampling analog-to-digital converter digitizes the full-wave rectified signal to obtain a bitstream. The oversampling ADC comprises a second-order or higher order delta-sigma modulator and a filter. The filter is configured to filter the bitstream to extract the digitized DC voltage value.

The present invention relates to an electrical device and a method for manufacturing thereof. The proposed device (100) comprises a capacitor including a porous structure (300), the porous structure (300) comprising: - a first electrode region (310) comprising first pores (311), wherein these first pores (311) comprise first conductive wires (312), - a second electrode region (320) comprising second pores (321), wherein these second pores (321) comprise second conductive wires (322), and - a dielectric region (330) comprising third pores (331) and interposed between the first and second electrode regions (310, 320), wherein the capacitor is formed by the first pores (311) of the first electrode region (310) and the second pores (321) of the second electrode region (320) facing each other and being separated by the third pores (331) of the dielectric region (330).

A microelectromechanical device comprising with a device layer and first and second comb structures. The bottom of the first comb structure has a z-coordinate which is greater than both the z-coordinate of the bottom face of the device layer and the z-coordinate of the bottom of the second comb structure. The top of the second comb structure has a z-coordinate which is smaller than both the z-coordinate of the top face of the device layer and the z-coordinate of the top of the first comb structure. The device layer also comprises a cavity which extends from the bottom face of the device layer to the bottom of the second comb structure.

A MEMS mirror device comprising a reflector, a support structure and a first suspension structure, the first suspension structure allows the reflector to rotate about a rotation axis. Stiffening springs extend from the support structure to the reflector. Each stiffening spring comprises one or more folds in the support plane.

An integrated structure comprising: a substrate (100, 101), a conductive layer, the conductive layer having a first cavity, the first cavity (102C) being filled with a first insulating region (103F), the first insulating region having a top surface flush with a top surface of the conductive layer to form a first planar surface (F1), a protective liner (104) on the top surface of the conductive layer and the top surface of the first insulating region, an anodization barrier layer (105) on the protective liner, the protective liner and the anodization barrier layer having a second cavity (105_104C) passing through the protective liner and the anodization barrier layer and opening onto the first insulating region, the second cavity being filled with a second insulating region (106F), the second insulating region having a top surface flush with a top surface of the anodization barrier layer to form a second planar surface (F2).

The invention concerns a method of forming at least one integrated device comprising:depositing a metal barrier layer (103) on a non-conducting substrate (100),depositing an anodizable metal layer (104) on the metal barrier layer,obtaining at least a first porous region (105A) comprising a plurality of substantially straight pores that extend from a top surface of the first porous region towards the metal barrier layer by anodizing the anodizable metal layer (104),depositing, on the first porous region(105A), an etching mask (EM) having at least one opening (OP) defining an etching zone,obtaining an insulating region (V) by etching the metal barrier layer located at the bottom of the etching zone through the opening of the etching mask so as to reach the substrate,forming said integrated device inside the pores of the first porous region.

A method of manufacturing an integrated electrical device comprising an energy storage component, comprising:providing a support comprising a porous region (103),forming an insulating layer (104) having an opening (OP) delimiting a portion of the porous region,forming a bottom electrode layer (105),etching the bottom electrode layer such that the bottom electrode layer is removed on the insulating layer and on the top surface of the portion of the porous region, such that there remains a bottom electrode layer inside pores of the portion of the porous region,forming an intermediate layer (106) comprising a dielectric layer or an ionic conductor,forming a top electrode layer (107) on the intermediate layer.

The disclosure relates to a MEMS gyroscope comprising a moving structure, a first stator, and a second stator to which a supplementary voltage signal is applied. The moving structure and the first stator form a first capacitor, and the moving structure and the second stator form a second capacitor. The moving structure is configured to move so that a capacitance of the first capacitor increases when a capacitance of the second capacitor decreases. The advantage of this arrangement is that the undesired AC current component induced by the driving signal is reduced without adding a second noisy drive electrode to the gyroscope.

The proposed electrical device (100) comprises a capacitor including: - a bottom electrode (110), - a dielectric structure (120) extending conformally on the bottom electrode (110) and comprising dielectric layers (121-123), wherein the dielectric structure (120) extends only within a central region of the bottom electrode (110), - a top electrode (130) extending conformally on the dielectric structure (120), - a passivation layer (160) extending on the bottom electrode (110) within a peripheral region of the bottom electrode (110), the peripheral region surrounding the dielectric structure (120) and extending up to lateral edges of the electrical device (100), and wherein: - the lateral edges of each of the dielectric layers (121-123) are covered at least by the passivation layer (160).

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Provided is a multilayer ceramic capacitor capable of improving self-alignment properties during mounting. A multilayer ceramic capacitor 10 according to the present invention is a multilayer ceramic capacitor including: a multilayer body having a first surface and a second surface that face each other in a lamination direction, a third surface and a fourth surface that face each other in a first direction orthogonal to the lamination direction, and a fifth surface and a sixth surface that face each other in a second direction orthogonal to the lamination direction and the first direction; a first outer electrode disposed on the third surface, the fifth surface, and the first surface; a second outer electrode disposed on the third surface, the sixth surface, and the first surface; a third outer electrode disposed on the fourth surface, the sixth surface, and the first surface; and a fourth outer electrode disposed on the fourth surface, the fifth surface, and the first surface. On the first surface, the first outer electrode includes a side A of the first outer electrode facing the fourth outer electrode and a side B of the first outer electrode facing the second outer electrode, the second outer electrode includes a side C of the second outer electrode facing the first outer electrode and a side D of the second outer electrode facing the third outer electrode, the third outer electrode includes a side E of the third outer electrode facing the second outer electrode and a side F of the third outer electrode facing the fourth outer electrode, and the fourth outer electrode includes a side G of the fourth outer electrode facing the third outer electrode and a side H of the fourth outer electrode facing the first outer electrode. The side B, the side C, the side F, and the side G are inclined in the same direction with respect to the first direction, and 0.85 ≤ L/W ≤ 1.0 is satisfied, where L is a dimension in the first direction and W is a dimension in the second direction.

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